Amplifier with active duty cycle correction

An amplifier with active duty cycle correction of an input signal to generate a corrected output signal, said amplifier circuit comprising:

• a first amplifier means receiving a first and second input representative of a differential uncorrected input signal and generating as output a differential output current;
• a duty cycle measurement means which measures the corrected output signal and generates as an output a differential signal representative of the difference of the duty cycle of the corrected output signal and a predetermined duty cycle;
• a second amplifier means which receives as input the output of the duty cycle measurement means and generates a correction current;
• summing means for summing the correction current and the differential output current to produce differential summed current signals;
• an integrating capacitance means which receives as input the summed differential current and generates as output a slew limited differential voltage signal, said integrating capacitance means causing the output to be slew limited for a portion of the input greater than the predetermined duty cycle, said slew limited differential voltage signal representative of the corrected output signal.

A method for actively correcting the duty cycle of an uncorrected input signal to generate a corrected output signal, said method comprising the steps of:

• measuring the duty cycle of the corrected output signal and generating as an output a signal representative of the difference of the duty cycle of the corrected output signal and a predetermined duty cycle;
• generating a correction signal from the signal representative of the difference of the duty cycle of the corrected output signal and a predetermined duty cycle;
• generating an uncorrected output signal from said uncorrected input signal
• summing the correction signal and uncorrected output signal to produce a summed signal;
• generating a slew limited voltage signal from the summed signal, said slew limited voltage signal being slew limited for a portion of the uncorrected input signal greater than the predetermined duty cycle, said slew limited voltage signal representative of the corrected output signal.