Capacitor for an integrated circuit and method of formation thereof, and a method of adding on-chip capacitors to an integrated circuit
AssigneeNorthern Telecom Limited
InventorsPak K. Leung, Ismail T. Emesh
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AssigneeNorthern Telecom Limited
InventorsPak K. Leung, Ismail T. Emesh
Estimating the term…
A capacitor structure and method of forming a capacitor structure for an integrated circuit is provided. The capacitor structure, comprising a bottom electrode, capacitor dielectric and top electrode, is formed on a passivation layer overlying the interconnect metallization. The capacitor electrodes are interconnected to the underlying integrated circuit from underneath, through conductive vias, to the underlying interconnect metallization. The method provides for adding capacitors to an otherwise completed and passivated integrated circuit. The structure is particularly applicable for ferroelectric capacitors. The passivation layer acts as a barrier layer for a ferroelectric dielectric. Large area on-chip capacitors may added without affecting the interconnect routing or packing density of the underlying devices, and may be added almost independently of the process technology used formation of the underlying integrated circuit.
A capacitor structure for an integrated circuit, the integrated circuit comprising active devices formed on a semiconductor substrate, overlying layers comprising interconnect metallization, a top dielectric layer having bond pad openings formed through the dielectric for contacting the underlying interconnect metallization, and a surface passivation layer formed over the integrated circuit,
A capacitor structure for an integrated circuit, the integrated circuit comprising active devices formed on a semiconductor substrate, overlying layers comprising interconnect metallization, a top dielectric layer having bond pad openings formed through the dielectric layer for contacting the underlying interconnect metallization, and a passivation layer formed over the integrated circuit,
A capacitor structure for an integrated circuit, the integrated circuit comprising active devices formed on a semiconductor substrate, overlying layers comprising interconnect metallization, a top dielectric layer having bond pad openings formed through the dielectric for contacting the underlying interconnect metallization, and a surface passivation layer formed over the integrated circuit,
A capacitor structure for an integrated circuit, the integrated circuit comprising active devices formed on a semiconductor substrate, overlying layers comprising interconnect metallization, a top dielectric layer having bond pad openings formed through the dielectric layer for contacting the underlying interconnect metallization, and a surface passivation layer extending over the integrated circuit,
Dependencies are inferred from the claim text.