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US 5,561,302 AGranted
Enhanced mobility MOSFET device and method
AssigneeMotorola, Inc.
InventorJon J. Candelaria
Life of this patent
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Abstract
An enhanced mobility MOSFET device (10) comprises a channel layer (12) formed on a monocrystalline silicon layer (11). The channel layer (12) comprises an alloy of silicon and a second material with the second material substitutionally present in silicon lattice sites at an atomic percentage that places the channel layer (12) under a tensile stress.
Claims17
An enhanced mobility semiconductor device comprising:
- a monocrystalline silicon layer of a first conductivity type;
- a carrier transport region formed on the monocrystalline silicon layer, wherein the carrier transport region comprises an alloy of silicon and a second semiconductor material, and wherein the second semiconductor material is substitutionally present in the carrier transport region lattice sites at an atomic percentage such that the carrier transport region is under tensile stress, and wherein the carrier transport region has a bandgap narrower than the monocrystalline silicon layer;
- a source region of a second conductivity type extending into the carrier transport region;
- a drain region of the second conductivity type extending into the carrier transport region, wherein a portion of the carrier transport region is between the source region and the drain region;
- and
- a control electrode electrically insulated from the carrier transport region, wherein the control electrode is disposed between the source region and the drain region.
3 more elements
A MOSFET structure including:
- a channel layer comprising a Si.sub.1-x C.sub.x alloy formed on a monocrystalline silicon layer of a first conductivity type, wherein carbon is present in the channel layer in substitutional lattice sites so that the channel layer is under tensile stress, and wherein the channel layer has a bandgap narrower than the monocrystalline silicon layer;
- an epitaxial silicon layer formed on the channel layer;
- a source region of a second conductivity type extending through the epitaxial silicon layer and at least into the channel layer;
- a drain region of the second conductivity type extending through the epitaxial silicon layer and at least into the channel layer, wherein part of the channel layer separates the source region from the drain region;
- a gate dielectric layer formed on the epitaxial silicon layer at least between the source region and the drain region;
- and
- a gate electrode formed on the gate dielectric layer.
4 more elements
Dependencies are inferred from the claim text.