Metal oxide semiconductor transistor and a method for manufacturing the same

A method for manufacturing a MOS transistor comprising the steps of:

• implanting first impurity ions of a first conductivity type and of a first impurity concentration in a semiconductor substrate of said first conductivity type, to form a first impurity region at a first depth;
• implanting second impurity ions of said first conductivity type and of a second impurity concentration and having a lower diffusion coefficient than said first impurity ions on said implanted first impurity ions, to form a second impurity region at a second depth in said semiconductor substrate shallower than said first depth;
• implanting third impurity ions of a second conductivity type opposite to said first conductivity type and of a third impurity concentration on said implanted second impurity ions, to form a third impurity region at a third depth in said semiconductor substrate shallower than said second depth, thereby forming a buried channel region between said second impurity region and said third impurity region;
• forming a gate insulating film on a surface of said semiconductor substrate;
• forming a gate electrode on said gate insulating film;
• and
• forming a source region and a drain region by implanting fourth impurity ions of said second conductivity type in said semiconductor substrate in alignment with said gate electrode.

A method for manufacturing a MOS transistor comprising the steps of:

• implanting first impurity ions of a first conductivity type in a substrate, to form a well region of first conductivity type;
• implanting first impurity ions of said first conductivity type in said well region, to form a first impurity region at a first depth;
• implanting second impurity ions of said first conductivity type having a lower diffusion coefficient than said first impurity ions in said semiconductor substrate, to form a second impurity region at a second depth shallower than said first depth;
• implanting third impurity ions of a second conductivity type opposite to said first conductivity type in said substrate, to form a third impurity region at a third depth shallower than said second depth, thereby forming a buried channel region between said second and third impurity regions;
• forming a gate insulating film on the surface of said substrate;
• forming a gate electrode of a first length on said gate insulating film;
• and
• forming a source region and drain region by implanting fourth impurity ions of said second conductivity type in said substrate.

A MOS transistor, comprising:

• a semiconductor substrate;
• a well region of a first conductivity type formed in said semiconductor substrate;
• a gate insulating oxide formed on said well region of said semiconductor substrate;
• a gate electrode of a first length formed on said gate insulating oxide;
• a source region and a drain region formed in said well region and spaced apart from each other between said gate insulating oxide and said well region, said source region and said drain region being of a second conductivity type;
• and
• a plurality of impurity regions formed in said well region between said source region and said drain region, said plurality of impurity regions including:
• a first impurity region for adjusting a threshold voltage of said MOS transistor and having impurities of a second conductivity type,
• a second impurity region for serving as a diffusion barrier and having impurities of said first conductivity type, and
• a third impurity region for preventing punchthrough and having impurities of said first conductivity type at a higher diffusion coefficient than that of said impurities of said second impurity region,
• said first impurity region, said second impurity region, and said third impurity region being formed at sequentially shallower depths in said semiconductor substrate;
• and
• a buried channel region formed between said first impurity region and said second impurity region.