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AssigneeLSI Logic Corporation
InventorsMichael D. Rostoker, Carlos Dangelo, Doron Mintz
Estimating the term…
A methodology for generating structural descriptions of complex digital devices from high-level descriptions and specifications. The methodology uses a systematic technique to map and enforce consistency of the semantics imbedded in the intent of the original, high-level descriptions. The design activity is essentially a series of transformations operating upon various levels of design representations. At each level, the intended meaning (semantics) and formal software manipulations are captured to derive a more detailed level describing hardware meeting the design goals. Important features of the methodology are: capturing the users concepts, intent, specification, descriptions, constraints and trade-offs; architectural partitioning; what-if analysis at a high level; sizing estimation; timing estimation; architectural trade-off; conceptual design with implementation estimation; and timing closure. The methodology includes using estimators, based on data gathered over a number of realized designs, for partitioning and evaluating a design prior to logic synthesis. From the structural description, a physical implementation of the device is readily realized. Techniques are provided for estimating design performance, from behavioral/functional descriptions. Given a behavioral or a block diagram description of data flow in a design, pin-to-pin timing and minimum clock cycle for the design can be estimated accurately. An RTL description may thus be synthesized from a behavioral description such that timing constraints imposed at the behavioral level are achieved. The timing of a synthesized design is estimated, and the design is re-synthesized until a design is arrived at that meets timing constraints imposed at a higher level.
In an ECAD system, a method of creating and validating a low level description of an electronic design from a higher level, behavior-oriented description thereof, comprising:
In an ECAD system, a method of deriving a structural description of a system from a behavioral description thereof, comprising:
In an ECAD system, a method of creating and validating a structural description of a device from a behavior-oriented description, comprising:
In an ECAD system, a method of partitioning the design of a digital device, comprising:
In an ECAD system, a method of creating and validating a structural description of a circuit or device from a higher level, behavior-oriented description thereof, comprising:
An ECAD system for creating and validating a structural description of a circuit or device from a higher level, behavior-oriented description thereof, comprising:
A method of estimating low-level timing characteristics from a high-level description of an electronic design, comprising:
Dependencies are inferred from the claim text.