Virtual processor module including a reconfigurable programmable matrix

A virtual processor module comprising:

• a programmable matrix array for processing data according to a hardware encoded algorithm;
• a plurality of local memory devices under control of the matrix array connected to the programmable matrix array for storage of data processing parameters, processing results, control and status information;
• a plurality of data memory devices under control of the matrix array for storing and retrieving data during processing by the programmable matrix array without involvement of an external host;
• a plurality of data bus controller and switch devices, responsive to the programmable matrix array, for addressing data stored in the data memory devices and for directing said data to and from the programmable matrix array;
• an I/O bus controller under control of the matrix array for connecting outside data buses to multiple points within programmable matrix array and for delivering data to and from external sources;
• a plurality of configuration memories for storage of configuration files for configuring the programmable matrix array with hardware encoded algorithms;
• a plurality of configuration controllers, one for controlling each said configuration memory according to an operation sequence map;
• and
• a virtual processor module controller for interaction with an external host, for sequencing configuration files to create an operation sequence map and loading the files into the configuration memories, for programming configuration controllers, for communicating with the programmable array matrix and delivering control information and parameters necessary for data processing from the local memory devices, and for reading results of the processing and status information;
• wherein an execution of a complex operation can be achieved by dividing it into a series of simpler operations, each executable by a configuration file provided to the programmable matrix array through partial or complete reconfiguration, transparently to an user.

A method for processing data for a specific application, the method comprising:

• providing a reconfigurable, programmable logic matrix array comprising two programmable processing elements controlled by a real time multitasking processor;
• providing a plurality of configuration files, each file for configuring the logic matrix array to perform an algorithm for processing data;
• sequencing a plurality of configuration files to perform a complex operation and for preparing an operation sequence map to control the configuration of the logic matrix array in said sequence;
• providing a sequence operation map and a sequence of configuration files to configure each programmable processing element to process data in accord with the respective sequence maps;
• configuring the two programmable processing elements with a first configuration for each programmable processing element and processing data with the two programmable processing elements in a synchronous mode wherein data is shared between the two programmable processing elements without involvement of an external host;
• and
• for each programmable processing element, after the data is processed by one configuration of the element, reconfiguring the element with a next configuration file in the sequence and continuing to process data until the operation sequence map is completed for both of the two elements.

A method for processing data for a specific application, the method comprising:

• providing a reconfigurable, programmable logic matrix array comprising two programmable processing elements controlled by a real time multitasking processor;
• providing a plurality of configuration files, each file for configuring a programmable processing element to perform an algorithm for processing data;
• sequencing a plurality of configuration files to perform a complex operation and for preparing an operation sequence map to control the configuration of each processing element in accord with said sequence;
• providing a sequence operation map and a sequence of configuration files to alternately configure each programmable processing element to process data in accord with the sequence map;
• configuring a first programmable processing element with a first configuration;
• configuring the second programmable processing element with a second configuration while processing data with the first processing element;
• alternately, configuring the first programmable processing element with a next configuration while processing data with the second programmable processing element and, then, configuring the second programmable processing element with another configuration while processing data with the first programmable processing element until the operation sequence map is completed for the two processing elements;
• wherein data is shared between the two programmable processing elements without involvement of an external host.

A method for processing data for a specific application, the method comprising:

• providing a reconfigurable, programmable logic matrix array controlled by a microprocessor;
• providing a library of configuration files, each file for configuring the logic matrix array to perform an algorithm for processing data;
• sequencing a first plurality of configuration files to perform a complex operation and for preparing an operation sequence map to control the configuration of the logic matrix array in said sequence;
• providing a operation sequence map to configure the logic matrix array to process data in accord with the sequence of configuration files specified by the operation sequence map;
• configuring the logic matrix array with a first configuration file and processing data in accord with the algorithm provided by the first configuration file and, after the data is processed by one configuration file, reconfiguring the logic matrix array with a next configuration file in the operation sequence map and continuing to process data until a programmed criteria is satisfied, thereby generating a configuration dependent operational event signal;
• obtaining a next configuration opcode from the logic matrix array in response to the configuration dependent operational event signal;
• locating a second plurality of configuration files in the library which are identified by the next configuration opcode;
• sequencing the second plurality of configuration files and preparing a second operation sequence map for the second plurality of configuration files;
• configuring the logic matrix array with the second plurality of configuration files in accord with the second operation sequence map to continue processing data;
• and
• providing a plurality of data memory devices accessible by the programmable matrix array for storing and retrieving data during processing by the programmable matrix array without involvement of an external host.