US 5,534,784 A · Method for probing a semiconductor wafer

Abstract

A method for probing a semiconductor wafer utilizes an array probe assembly (60) which includes a production package substrate (64). Substrate (64) is used to transform a configuration of conductive pads (74) on a probe card (62) into a configuration which matches that of conductive bumps (54) on a semiconductor die (52). Array probe assembly (60) may also include an array probe head (68) having probe wires (84) for coupling conductive pads (80) on substrate (64) with conductive bumps (54) on die (52). After probing the die, the die are assembled into a final packaged semiconductor device (110) which includes a substrate (90) which is nearly identical to the substrate used in the array probe assembly. Use of a production package substrate in the array probe assembly reduces the cost of the array probe assembly, and results in more accurate testing since the substrate in the array probe assembly will emulate the performance of the die in the final packaged device.

Claims18

Dependent claims

A method for probing wafers comprising the steps of:

providing a semiconductor wafer having a plurality of semiconductor die formed thereon, each die having a plurality of conductive bumps arranged in a first array;
providing a probe card having a plurality of conductive pads arranged in a second array different from the first array;
providing a first production package substrate having a first side which has a plurality of conductive pads arranged in the first array and an opposing second side which has a plurality of conductive pads arranged in the second array, wherein the plurality of conductive pads of the second side of the substrate are electrically connected to the plurality of conductive pads on the probe card;
and
probing a first die of the plurality of semiconductor die by electrically connecting the plurality of conductive pads on the first side of the first production package substrate with the plurality of conductive bumps on the first die and performing electrical tests on the first die.

2 more elements

A method for probing wafers comprising the steps of:

providing a probe assembly for use in a tester, the probe assembly comprising:
a probe card having a plurality of conductive traces which electrically terminate in a first array configuration;
a first production package substrate having first and second opposing sides, wherein the first side has a first plurality of conductive pads arranged in the first array configuration, wherein the second side has a second plurality of conductive pads electrically connected to the first plurality of conductive pads and arranged in a second array configuration which is smaller in area than the first array configuration, and wherein the first plurality of conductive pads of the substrate is electrically connected to the plurality of conductive traces of the probe card;
a probe needle assembly having a plurality of probe needles arranged in the second array configuration and electrically connected to the second plurality of pads on the second side of the substrate;
providing a semiconductor wafer having a plurality of semiconductor die, each die having a plurality of die pads arranged in the second array configuration;
probing a first semiconductor die of the plurality of semiconductor die by bringing the plurality of die pads of the first die into electrical contact with the plurality of probe needles and using the tester to perform electrical diagnostics on the first die.

3 more elements

A method for probing wafers comprising the steps of:

providing a semiconductor wafer having a plurality of semiconductor die formed thereon, wherein each semiconductor die has a plurality of die pads arranged in a first configuration;
providing a probe card assembly for use in a tester, the probe card assembly comprising:
a probe card having a plurality of conductive traces configured for suitable electrical connection to the tester, and having a plurality of conductive pads arranged in a second configuration, different from the first configuration, and electrically coupled to the plurality of conductive traces;
a first production package substrate having a first surface with a plurality conductive pads arranged in the second configuration and electrically connected to the plurality of conductive pads on the probe card, and having a second surface opposite the first surface, the second surface having a plurality of conductive pads arranged in the first configuration;
and
means for electrically connecting the plurality of conductive pads on the second surface of the first production package substrate with the plurality of conductive pads on a first die of the plurality of die;
bringing the semiconductor wafer in proximity to the probe card assembly such that electrical connections are made between the plurality of conductive pads on the first die and the conductive traces on the probe card;
and
electrically testing the first die.

6 more elements

Dependencies are inferred from the claim text.

Method for probing a semiconductor wafer

Life of this patent

Method for probing a semiconductor wafer

Life of this patent

Abstract

Claims18