Soft errors handling in EEPROM devices
AssigneeSanDisk Corporation
InventorsDaniel L. Auclair, Jeffrey Craig, John S. Mangan, Robert D. Norman, Daniel C. Guterman, Sanjay Mehrotra
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AssigneeSanDisk Corporation
InventorsDaniel L. Auclair, Jeffrey Craig, John S. Mangan, Robert D. Norman, Daniel C. Guterman, Sanjay Mehrotra
Estimating the term…
Soft errors occur during normal use of a solid-state memory such as EEPROM or Flash EEPROM. A soft error results from the programmed threshold voltage of a memory cell being drifted from its originally intended level. The error is initially not readily detected during normal read until the cumulative drift becomes so severe that it develops into a hard error. Data could be lost if enough of these hard errors swamps available error correction codes in the memory. A memory device and techniques therefor are capable of detecting these drifts and substantially maintaining the threshold voltage of each memory cell to its intended level throughout the use of the memory device, thereby resisting the development of soft errors into hard errors.
A solid-state memory system comprising:
A solid-state memory system comprising:
A solid-state memory system comprising:
In a solid-state memory system including an array of memory cells that are individually capable of having a threshold voltage programmed or erased to an intended level within a range supported by the memory system, wherein soft errors may arise from cells with a shifted threshold voltage, a method for detecting and correcting soft errors comprising the steps of:
In a solid-state memory system including an array of memory cells, each cell capable of having at least one of its threshold voltages programmed or erased to an intended level within a range supported by the memory system, wherein soft errors may arise from cells with a shifted threshold voltage, a method for detecting and correcting soft errors comprising the steps of:
In a solid-state memory system including an array of memory cells, each cell capable of having at least one of its threshold voltages programmed or erased to an intended level within a range supported by the memory system, wherein soft errors may arise from cells with a shifted threshold voltage, a method for detecting and correcting soft errors comprising the steps of:
A solid-state memory system comprising:
In a solid-state memory system including an array of memory cells that are individually capable of having a threshold voltage programmed or erased to an intended level within a range supported by the memory system, wherein soft errors may arise from cells with a shifted threshold voltage, a method for detecting and correcting soft errors comprising:
Dependencies are inferred from the claim text.