Drill coordinate optimization for multi-layer printed circuit board

An automated drilling system for drilling a hole pattern in a multilayer laminated circuit board at optimized drill coordinates, the board having formed thereon one or more spaced test patterns in at least two of the layers prior to lamination of the layers, arranged at one or more predetermined nominal test pattern locations in the layers, so that a test pattern in at least one layer nominally overlays a test pattern in another layer under nominal board assembly conditions, comprising;

• means for forming an opening in an exposed surface of said laminated circuit board at each of said test pattern locations, said openings having a depth sufficient to penetrate each layer having said test patterns formed therein and having a cross-sectional dimension which decreases in size from a dimension at said board surface to a smaller dimension at said depth, thereby exposing portions of said test patterns;
• image forming means for forming from above said surface a single image of each said opening, each said image comprising pixels representing said exposed portions of said test patterns;
• processing means for processing said images of said openings to determine, from said exposed portions of said test patterns, deviations from nominal positions of said test patterns of said layers;
• and
• optimizing means for optimizing a set of drill coordinates to compensate for said deviations.

An automated drilling system, comprising:

• a work table having means for registering a mounted position of a workpiece;
• a drilling spindle having a spindle axis mounted orthogonally to said work table;
• optical image means for capturing digitized optical images of an area of said workpiece mounted on said work table, from an image position generally orthogonal to said work table and spaced from a surface of said workpiece mounted at said registered position;
• precision positioning means for effecting relative movement between said work table and said spindle and between said work table and said image position in a plane orthogonal to a spindle axis;
• means for providing a nominal drill pattern program specifying nominal drill size and coordinates of a drill pattern to be drilled into said board;
• drill coordinate optimization means for compensating said nominal drill coordinates for inter-layer shifts of layers comprising said board from nominal positions, said means comprising means for cutting an opening into said board at said nominal test pattern locations, said opening having an opening depth and cross-sectional dimension which decreases from said board surface to said depth so as to expose portions of said test patterns in said various layers to view from above said surface, means for operating said positioning system for each test pattern location to position said opening relative to said image position so that an optical image of said opening is visible from said location, means for operating said image means to capture said image of said opening and said visible portions of said test patterns, processing means for processing said images to determine deviations from nominal layer locations of said respective layers and to calculate compensation values, and means for modifying said nominal hole coordinates by said compensation values;
• and
• system control means for operating said positioning means and said drilling spindle to drill said board in accordance with compensated hole coordinates.

A method for measuring lamination drift in a laminated multilayer printer circuit board, comprising a sequence of the following steps:

• forming one or more spaced test patterns in at least two of said layers prior to lamination of said layers to form said board, said test patterns arranged at one or more predetermined nominal test pattern locations in said layers, so that a test pattern in at least one layer nominally overlays a test pattern in another said layer under nominal board assembly conditions;
• forming an opening in an exposed surface of said laminated circuit board at each of said test pattern locations, said openings having a depth sufficient to penetrate each layer having said test patterns formed therein and having a cross-sectional dimension which decreases in size from a dimension at said board surface to a smaller dimension at said depth, thereby exposing portions of said test patterns;
• forming from above said surface a single image of each said opening, each said image comprising pixels representing said exposed portions of said test patterns;
• and
• processing said images of said openings to determine, from said exposed portions of said test patterns, deviations from nominal positions of said test patterns of said layers.