IGBT device with platinum lifetime control and reduced gaw

An improved MOS-type insulated gate controlled power switching device comprising:

• a semiconductor substrate having an upper surface and a lower surface and including one or more layers defining a drain region of a first dopant type extending from the upper surface toward the lower surface of the substrate;
• an insulative layer on the upper surface of the substrate;
• an insulated gate contact layer on the insulative layer;
• double diffused regions including a body region of a second, opposite dopant type and a source region of the first dopant type within the body region, the body region forming two PN junctions with the drain and source regions, respectively spaced apart so as to define a channel region in the body region subjacent the insulated gate contact;
• a source contact layer alongside the gate contact but spaced insulatively therefrom, the source contact forming an electrical connection to the source region and the body region and a short therebetween and defining a source or cathode contact for the device;
• and
• a drain or anode contact on the lower surface of the substrate;
• the insulated gate contact layer and the source contact layer being patterned to form a plurality of complementary, parallel interdigitated gate and source fingers and a gate bus interconnecting the gate fingers;
• the body and source regions extending lengthwise along opposite margins of the gate fingers and gate bus, the body regions being spaced at a first lateral spacing L.sub.1 beneath the gate fingers across the drain region of a first dopant type and being spaced at a second spacing L.sub.2 beneath the gate bus greater than the first spacing L.sub.1 and forming a first breakdown prone region;
• at least a portion of the first breakdown prone region being doped with dopant of the second dopant type over lateral extent effective to interconnect the body regions beneath the gate bus and neutralize a portion of the channel region adjoining the interconnection.

An improved MOS-type insulated gate controlled power switching device comprising:

• a semiconductor substrate having an upper surface and a lower surface and including one or more layers defining a drain region of a first dopant type extending from the upper surface toward the lower surface of the substrate;
• an insulative layer on the upper surface of the substrate;
• and insulated gate contact layer on the insulative layer;
• double diffused regions including a body region of a second, opposite dopant type and a source region of the first dopant type within the body region, the body region forming two PN junctions with the drain and source regions, respectively spaced apart so as to define a channel region in the body region subjacent the insulated gate contact;
• a source contact layer alongside the gate contact but spaced insulatively therefrom, the source contact forming an electrical connection to the source region and the body region and a short therebetween the defining a source or cathode contact for the device;
• a drain or anode contact on the lower surface of the substrate;
• and
• a dielectric film on the upper surface of the substrate, the film having a silicon-oxide-nitride composition having an oxygen content sufficient that the film has an index of refraction of 1.9 or less so that the film is substantially nonpolarizable under high voltage conditions, the dielectric film comprising a conformal first layer of phosphosilicate glass (PSG) with a phosphorus content of less than 4% that is nonpolarizable even under very high voltage conditions and a second layer that is composed of a dielectric suitable to form a moisture and mobile ion resistant barrier atop the first, PSG layer.

An improved MOS-type insulated gate controlled power switching

• device comprising:
• a semiconductor substrate having a first layer of a first dopant type defining a device anode and second layer of a second, opposite-polarity dopant type defining a drain region extending from an upper surface of the substrate toward the first layer;
• insulative layer on the upper surface of the second layer of the substrate;
• an insulate gate contact layer on the insulative layer;
• double diffused regions including a body region of the first dopant type and a source region of the second dopant type within the body region, the body region forming two PN junctions with the drain and source regions, respectively spaced apart so as to define a channel region in the body region subjacent the insulated gate contact;
• a source contact alongside the gate contact but spaced insulatively therefrom, the source contact forming an electrical connection to the source region and the body region and a short therebetween and defining a cathode contact for the device;
• an anode contact on the opposite side of the substrate in electrical connection to the first layer;
• the second layer including:
• a first portion contacting the first layer and having a first thickness and a first doping concentration;
• a second portion contacting the first portion of the second layer and extending to said upper surface adjacent said double diffused regions;
• the second portion being sized to a second thickness and doped to a second doping concentration sufficient to block a predetermined maximum reverse bias voltage;
• and
• the first portion being sized to a thickness greater than 20 micrometers and doped to a first doping concentration greater than the second doping concentration and less than 10.sup.16 atoms/cm.sup.3 to produce a predetermined output impedance (R.sub.o) sufficient to resist current flow during forward conduction when a high voltage (V.sub.ce) is across the cathode and anode contacts;
• a predetermined dose of atoms of a selected transition metal diffused throughout the substrate to effect a minority carrier lifetime control;
• the selected transition metal having a deep level in silicon suitable for recombination;
• and
• the predetermined dose being less than a maximum dose of the selected transition metal that can be fully dissolved into the substrate at a temperature in a range between an eutectic temperature of the substrate and the transition metal and an annealing temperature of the substrate.

An improved MOS-type insulated gate controlled power switching device comprising:

• a semiconductor substrate having a first layer of a first dopant type defining a device anode and second layer of a second, opposite-polarity dopant type defining a drain region extending from an upper surface of the substrate toward the first layer;
• an insulative layer on the upper surface of the second layer of the substrate;
• an insulated gate contact layer on the insulative layer;
• double diffused regions including a body region of the first dopant type and a source region of the second dopant type within the body region, the body region forming two PN junctions with the drain and source regions, respectively spaced apart so as to define a channel region in the body region subjacent the insulated gate contact;
• a source contact alongside the gate contact but spaced insulatively therefrom, the source contact forming an electrical connection to the source region and the body region and a short therebetween and defining a cathode contact for the device;
• an anode contact on the opposite side of the substrate in electrical connection to the first layer;
• the second layer including:
• a first portion contacting the first layer and having a first thickness and a first doping concentration;
• a second portion contacting the first portion of the second layer and extending to said upper surface adjacent said double diffused regions;
• the second portion being sized to a second thickness and doped to a second doping concentration sufficient to block a predetermined maximum reverse bias voltage;
• and
• the first portion being sized to a thickness greater than 20 micrometers and doped to a first doping concentration greater than the second doping concentration to produce a predetermined output impedance (R.sub.o) sufficient to resist current flow during forward conduction when a high voltage (V.sub.ce) is across the cathode and anode contacts,
• a predetermined dose of atoms of a selected transition metal diffused substantially uniformly throughout the substrate to effect a minority carrier lifetime control;
• the selected transition metal having a deep level in silicon suitable for recombination;
• and
• the predetermined dose being less than a maximum dose of the selected transition metal that can be fully dissolved into the substrate at a temperature in a range between an eutectic temperature of the substrate and the transition metal and an annealing temperature of the substrate.