Distributed processing device for a digital filter
AssigneesHiroaki Terada, Mistubishi Denki Kabushiki Kaisha, Sharp Kabushiki Kaisha
InventorsHiroaki Terada, Makoto Iwata, Masayuki Mizuno
Life of this patent
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Abstract
A horizontal synchronizing signal is counted by a binary counter. A first switch is switched in response to the count value, whereby signal data is classified. A sampling clock signal is counted by a binary counter. An output of the first switch is switched by second and third switches in response to the count value, whereby the data input rate of signal data is reduced. Each classified signal is subjected to filtering by a two-dimensional FIR digital filter.
Claims8
A distributed processing device for applying distributed processing on a digital filter, comprising:
- signal data classifying means for classifying input signal data according to a predetermined rule for reducing a data input rate;
- and
- filtering means for carrying out separate digital filtering processes for each output of said signal data classifying means,
- a sampling clock signal and a horizontal synchronizing signal being input to said signal data classifying means, which comprises
- first count means for counting said horizontal synchronizing signal,
- second count means for counting said clock signal,
- first switching means for classifying and outputting the signal data according to a first count output of said first count means, and
- second switching means for further classifying the signal data output said first switching means and for outputting the signal data according to a second count output of said second count means.
A distributed processing method for a digital filter comprising the steps of:
- classifying input signal data as plural classified signal data according to a predetermined rule to reduce a data input rate of the signal data;
- and
- digitally filtering the plural classified signal data separately,
- said step of classifying comprising
- counting an externally provided horizontal synchronizing signal to generate a first count signal,
- counting an externally provided clock signal to generate a second count signal,
- switching the input signal data as one of either first or second signal data in accordance with the first count signal, and
- switching the first signal data as one of either first and second classified signal data and the second signal data as one of either third and fourth classified signal data, in accordance with the second count signal.
Dependencies are inferred from the claim text.