Communication system uses diagnostic processors and master processor module to identify faults and generate mapping tables to reconfigure communication paths in a multistage interconnect network

A multiprocessor system, comprising:

• a plurality of processors;
• a network interconnecting the processors, comprising a plurality of logic switch nodes having input/output ports, each of the switch nodes further comprising means for detecting faults in the switch node, and means for storing a mapping table in the switch node that identifies active and inactive input/output ports of the switch node, the switch nodes arranged into more than log.sub.b N switch node stages, wherein b is a total number of switch node input/output ports, and log.sub.b N indicates a ceiling function providing the smallest integer not less than log.sub.b N, the switch node stages thereby providing a plurality of paths between any network input port and network output port;
• one or more diagnostic processors, coupled to each of the switch nodes, for receiving data from each of the switch nodes identifying the detected faults in each of the switch nodes, and for transmitting the mapping tables to the switch nodes;
• and
• a master processor module, coupled to the diagnostic processors, for receiving the data from the diagnostic processors identifying the detected faults in the switch nodes, for generating the mapping tables to activate and deactivate communications ports in each of the switch nodes based on the received data to thereby re-configure communications paths between switch nodes, and for transmitting the mapping tables to the diagnostic processor for storage into the switch nodes.