Voltage to current converter with extended dynamic range

A voltage to current convertor system, comprising:

• (a) an input;
• (b) an output;
• (c) a power supply voltage source;
• (d) a first differential amplifier having a first input, a second input, and a first output, said first input coupled to said input;
• (e) a first transistor having a first source, a first gate, and a first drain, said first source coupled to said first power supply voltage source, said first gate coupled to said output of said first differential amplifier, said first gate of a first conductivity type, and said first drain coupled to said second input of said first differential amplifier;
• (f) a second transistor having a second source, a second gate, and a second drain, second source coupled to said first power supply voltage, said second gate coupled to said output of said first differential amplifier, said second gate of said first conductivity type, and said second drain coupled to said output;
• (g) a first resistive element coupled between said first drain of said first transistor and a reference voltage;
• and
• (h) a second differential amplifier having a first input, a second input, and a second output, said first input of said second differential amplifier coupled to said input;
• (i) a third transistor having a third source, a third gate, and a third drain, said third source coupled to a second power supply voltage, said third gate coupled to said output of said first differential amplifier, said third gate of a second conductivity type, said second conductivity type opposite from said first conductivity type,and said third drain coupled to said second input of said first differential amplifier;
• (j) a fourth transistor having a fourth source, a fourth gate, and a fourth drain, said fourth source coupled to a second power supply voltage, said fourth gate coupled to said output of said first differential amplifier, said fourth gate of a second conductivity type, and said fourth drain coupled to said output;
• and
• (k) a second resistive element coupled between said third drain of said third transistor and a reference voltage.

A voltage-to-current convertor system, comprising:

• (a) an input;
• (b) an output;
• (c) a power supply voltage source;
• (d) a plurality of comparator pairs, each comparator of each comparator pair of said plurality of comparators pairs having a first input coupled to said input, a second input, and an output;
• (e) a first plurality of transistor pairs, each transistor of said first plurality of transistors pairs having a first gate, a first drain, and a first source, said first gate of one transistor of each transistor pair of said first plurality of transistor pairs coupled to one output of one comparator of said plurality of comparator pairs and said first gate of another transistor of each transistor pair of said first plurality of transistor pairs coupled to another output of another comparator of said plurality of comparator pairs, said drain of one transistor of each transistor pair of said first plurality of transistor pairs coupled to said power supply voltage source via a first resistive load and to said second input of said second input of one comparator of said plurality of comparator pairs and said drain of another transistor of each transistor pair of said first plurality of transistor pairs coupled to a first reference voltage, said source of one transistor of each transistor pair of said first plurality of transistor pairs coupled a second reference voltage and said source of another transistor of each transistor pair of said first plurality of transistor pairs coupled to said power supply voltage source via a second resistive load and to said second input of said second input of another comparator of said comparator pair of said plurality of comparator pairs;
• and
• (f) a second plurality of transistor pairs, each transistor of said first plurality of transistors pairs having a second gate, a second drain, and a second source, said second gate of one transistor of each transistor pair of said second plurality of transistor pairs coupled to one output of one comparator of said plurality of comparator pairs and said second gate of another transistor of each transistor pair of said second plurality of transistor pairs coupled to another output of another comparator of said plurality of comparator pairs, said second drain of one transistor of each transistor pair of said second plurality of transistor pairs coupled to said output, said drain of another transistor of each transistor pair of said second plurality of transistor pairs coupled to said first reference voltage, and said source of one transistor of each transistor pair of said first plurality of transistor pairs coupled to said second reference voltage and said source of another transistor of each transistor pair of said first plurality of transistor pairs coupled to said output.