Single-chip micro-computer having a plurality of operation modes
AssigneeSeiko Epson Corporation
InventorHideaki Yokouchi
Life of this patent
Estimating the term…
Abstract
Disclosed are a single-chip micro-computer optimized for an electronic memorandum book, an electronic dictionary or the like by suppressing the increase of the number of terminals, and an electronic apparatus having therein the single-chip micro-computer. The single-chip micro-computer has: a mode setting register for establishing a mode setting signal for either a first mode for outputting a memory address signal or a second mode for outputting an arithmetic operation output stored in an output register on the basis of a control signal from a micro instruction generation circuit; and a selection circuit for outputting either the memory address signal or the arithmetic operation output to address signal terminals on the basis of the mode setting signal.
Claims9
A single-chip micro-computer comprising:
- an output register for storing an arithmetic operation output and for outputting the arithmetic operation output to an outer terminal;
- an address generating circuit for outputting a memory address signal to the outer terminal;
- a program instruction memory means for storing and outputting program instructions;
- a mode setting register for setting one of first and second mode setting signals on the basis of the output program instructions of the program instruction memory means;
- and
- a selection circuit for selecting the memory address signal output to the outer terminal when the one of the mode setting signal from said mode setting register is the first mode setting signal and for selecting the arithmetic operation output to the outer terminal when the one of the mode setting signals from the mode setting register is the second mode setting signal.
A single-chip micro-computer comprising:
- an output register member for storing an arithmetic operation output and for outputting the same to an outer terminal;
- an address generating circuit for outputting a memory address signal to said outer terminal;
- a mode setting register for setting cyclically a plurality of mode setting signals;
- and
- a selection circuit for selecting a signal outputted from said outer terminal as said memory address signal when a mode setting signal of said mode setting register is set to the first mode, and for selecting a signal outputted from said outer terminal as said arithmetic operation output when said mode setting signal is set to the second mode.
An electronic apparatus comprising:
- an output register member for storing an arithmetic operation output and for outputting the same to an output terminal;
- program instruction memory means for storing and outputting program instructions;
- a mode setting register for setting a plurality of modes on the basis of the program instructions from said program instruction memory means;
- and
- a selection circuit for selecting a signal outputted from said output terminal as said memory address signal when said mode setting signal is set to the first mode, and for setting a signal outputted from said outer terminal as said arithmetic operation output when said mode setting signal is set to the second mode.
Dependencies are inferred from the claim text.