Methods for analyzing computer program performance
OwnerR. Nick K. Bolandinventor
Life of this patent
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Abstract
A method for analyzing program execution characteristics such as the minimum and maximum execution time, and maximum stack depth of a processor. The process examines every possible path through a program accumulating required information. The results guarantee best or worst case results since every path is examined. The time to produce these results is greatly reduced over other methods.
Claims4
A computer implemented process for analyzing computer program instruction characteristics in a data processing system, said data processing system executing a plurality of instructions, said instructions having instruction characteristics, said computer implemented process comprising the steps of:
- (a) selecting an instruction for analysis;
- (b) determining if instruction characteristics for instructions following the selected instruction are known;
- (c) analyzing, if a result of said determining step is negative, said instructions following said selected instruction to determine instruction characteristics thereof;
- (d) analyzing said selected instruction to determine instruction characteristics thereof;
- and
- (e) saving said instruction characteristics determined in steps (c) and (d);
- wherein said instruction characteristics include execution time and the computer implemented process further comprises the steps of:
- (f) repeating steps (a)-(e) until execution times for all branches of said plurality of instruction have been analyzed;
- and
- (g) using said saved execution times to determine at least one of a maximum execution time and a minimum execution time for said plurality of instruction.
A computer implemented process for analyzing computer program instruction execution time in a data processing system, said data processing system executing a plurality of instructions, said instructions having execution times, said computer implemented process comprising the steps of:
- (a) setting a counter to a starting address;
- (b) identifying an instruction at an address pointed to by said counter as a conditional branch instruction or another type of instruction;
- (c) checking a flag, if said instruction is a conditional branch instruction, to determine if execution time information associated with instructions following the conditional branch instruction has been saved;
- (d) analyzing, if a result of step (c) is negative, said instructions following said conditional branch instruction to obtain execution time information associated therewith;
- (e) setting, after said analyzing step, said flag to indicate that said instructions following said conditional branch instruction have been evaluated;
- (f) retrieving, if said result of step (c) is positive, execution time information associated with said instructions following said conditional branch instruction;
- (g) analyzing, if said instruction is another type of instruction, said instruction to obtain execution time information associated therewith;
- (h) saving said instruction execution time information which has been obtained by one of steps (d), (f) or (g);
- (i) incrementing said counter;
- (j) repeating steps (b)-(i) until an address in said counter is equal to a stop address;
- and
- (k) using said saved execution time information to determine at least one of a maximum execution time and a minimum execution time for said plurality of instructions.
A computer implemented process for analyzing computer program instruction stack information time in a data processing system, said data processing system executing a plurality of instructions, said instructions having execution times, said computer implemented process comprising the steps of:
- (a) setting a counter to a starting address;
- (b) identifying an instruction at an address pointed to by said counter as a conditional branch instruction or another type of instruction;
- (c) checking a flag, if said instruction is a conditional branch instruction, to determine if stack information associated with instructions following the conditional branch instruction has been saved;
- (d) analyzing, if a result of step (c) is negative, said instructions following said conditional branch instruction to obtain stack information associated therewith;
- (e) setting, after said analyzing step, said flag to indicate that said instructions following said conditional branch instruction have been evaluated;
- (f) retrieving, if said result of step (c) is positive, stack information associated with said instructions following said conditional branch instruction;
- (g) analyzing, if said instruction is another type of instruction, said instruction to obtain stack information associated therewith;
- (h) saving said instruction stack information which has been obtained by one of steps (d), (f) or (g);
- (i) incrementing said counter;
- (j) repeating steps (b)-(i) until an address in said counter is equal to a stop address;
- and
- (k) using said saved stack information to determine at least one of a maximum instruction stack and a minimum instruction stack for said plurality of instructions.
Dependencies are inferred from the claim text.