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US 5,517,611 AGranted
Floating-point processor for a high performance three dimensional graphics accelerator
AssigneeSun Microsystems, Inc.
InventorMichael F. Deering
Life of this patent
Estimating the term…
Abstract
A floating-point processor implements specialized graphics micro instructions. The specialized graphics micro instructions include a swap micro instruction which causes a hardware remapping of general purpose register groups to sort triangle vertices. The specialized graphics micro instructions also include specialized conditional branches for three dimensional geometry.
Claims27
A method for performing floating-point processing functions for a graphics accelerator, comprising the steps of:
- receiving a reformatted geometry packet over a command to floating-point bus from a command preprocessor, and buffering the reformatted geometry packet in a multiple buffer input register file;
- generating an draw packet by reading a plurality of specialized graphics micro instructions from a control store and executing the specialized graphics micro instructions using a set of function units and a general purpose register file having a first register group, a second register group and a third register group, the specialized graphics micro instructions comprising a floating-point compare micro instruction and a swap micro instruction, the swap micro instruction rearranging a register map for the general purpose register file according to a series of result flags corresponding to the floating-point compare micro instruction, such that a set of vertex values stored in the first, second, and third register groups are sorted in a predefined order;
- broadcasting the draw packet over a command to draw bus to a plurality of draw processors.
A floating-point processor for a graphics accelerator comprising:
- a general purpose register file having a plurality of register groups optimized to provide data storage for commonly occurring three dimensional graphics processing algorithms;
- and
- circuitry providing a plurality of specialized graphics micro instructions including a set of micro instructions for sorting a set of triangle vertex values in preparation for scan conversion in the graphics accelerator, said circuitry includes a control store to store said plurality of specialized graphics micro instructions, and a set of function units to execute said plurality of specialized graphics micro instructions in order to produce a draw packet.
A floating-point processor for a graphics accelerator, comprising:
- an input circuit having a multiple buffer input register file, said input circuit receiving a reformatted geometry packet and buffering said reformatted geometry packet;
- a register file circuit having a general purpose register file to store information used to assemble a draw packet, said register file circuit coupled to said input circuit;
- a control sequencer coupled to said input circuit and said register file circuit to assemble said draw packet by reading a plurality of specialized graphics micro instructions from a control store and executing said plurality of specialized graphics micro instructions using a set of function units;
- and
- an output circuit having a multiple buffer output register file to receive said draw packet from said control sequencer, buffer said draw packet, and output said draw packet, said output circuit coupled to said input circuit, said register file circuit, and said control sequencer.
2 more elements
Dependencies are inferred from the claim text.