Sync interpolative circuit and sync state detecting circuit of a disc reproducing apparatus
AssigneeSamsung Electronics Co., Ltd.
InventorCheon-seong Lee
Life of this patent
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Abstract
A sync interpolative circuit and sync state detecting circuit for use in a disc reproducing apparatus, which reproduces data by generating an interpolative sync signal even when a sync pattern of reproduced data is changed or no sync signal exists. The sync interpolative circuit generates the interpolative sync signal for accurately reproducing desired data, and the sync state detecting circuit informs a controlling portion of a state of the sync signal detected from the disc to facilitate data processing in the sector unit, thereby providing for more accurate reproduction of data regardless of errors in the sync signal.
Claims18
A sync interpolative circuit for generating a sync signal employed to reproduce data corresponding to a sector unit read out from a disc having data stored in the sector unit, comprising:
- an effective sync signal generator for receiving a window signal and a detected sync signal reproduced from said disc to generate an effectively-detected sync signal when said detected sync signal is present during a window interval determined by said window signal, receiving a window timing signal and an interpolative sync signal to generate an effective interpolation sync signal when said interpolative sync signal precedes said detected sync signal within the window interval, and logically summing said effective interpolation sync signal and said effectively-detected sync signal to generate an effective sync signal;
- a clear signal generator for receiving said effectively-detected sync signal and said effective interpolation sync signal from said effective sync signal generator to generate a counter clear signal after an interval of time elapses corresponding to one sector unit;
- a counting unit means for receiving said counter clear signal to generate a window timing rising signal and a window timing falling signal for determining a preset width of said window timing signal;
- an interpolative sync signal generator for generating said window timing signal in response to said window timing rising signal and window timing falling signal, and generating said interpolative sync signal upon elapse of a predetermined time set from an activation of said window timing rising signal;
- and
- a window signal generator for generating a window lock signal in response to said detected sync signal and said interpolative sync signal, and generating said window signal by logically summing said window lock signal and said window timing signal.
A sync state detecting circuit in an apparatus for generating a sync signal, to reproduce data in a sector unit read out from a disc having tracks, comprising:
- an effective sync signal generator for receiving a detected sync signal reproduced from said disc and a window signal from a window signal generator to generate an effectively-detected sync signal when said detected sync signal exists within a first window interval determined by said window signal, receiving a window timing signal and an interpolative sync signal to generate an effective interpolation sync signal when said interpolative sync signal precedes said detected sync signal within a second window interval determined by said window timing signal, and supplying said effective interpolation sync signal and said effectively-detected sync signal as an effective sync signal;
- a clear signal generator for receiving said effectively-detected sync signal and said effective interpolation sync signal from said effective sync signal generator to generate a counter clear signal in an interval corresponding to one sector unit;
- a counting unit means for receiving said counter clear signal to generate a window timing before-rising signal, a window timing rising signal and a window timing falling signal both for determining said second window interval of said window timing signal;
- an interpolative sync signal generator for generating said window timing signal in response to said window timing rising signal and window timing falling signal, and generating said interpolative sync signal upon elapse of a predetermined time set by said window timing rising signal;
- said window signal generator for generating a window lock signal by comparing timing of said detected sync signal and said interpolative sync signal, and generating said window signal by logically summing said window lock signal and said window timing signal;
- and
- a normal sync detector for receiving said window timing signal, said interpolative sync signal and said detected sync signal to generate a first state signal that represents a state in which said interpolative sync signal corresponds to said detected sync signal.
Dependencies are inferred from the claim text.