Cyclic coding and cyclic redundancy code check processor

A cyclic redundancy check processor for a generator polynomial G(X) of degree m (m is an integer satisfying m.ltoreq.n/2) using a computer for data processing by units of n bits comprising:

• residue table storage means for storing a residue table containing 2.sup.n pieces of residue data having n/2 bits obtained by division of 2.sup.n pieces of data having n bits by said generator polynomial;
• data read means for reading out said data having n bits for cyclic redundancy check;
• address generation means for generating addresses of said residue data to be read out from said residue table storage means;
• residue data read means for reading said residue data out of said residue table storage means according to the generated addresses,
• data save means for saving the data for said cyclic redundancy check, said data save means generating save data by saving the lower n/2 bits of the data for said cyclic redundancy check;
• data shift means which shifts the data for said cyclic redundancy check, said data shift means generating the shift data by shifting the higher n/2 bits of the data for said cyclic redundancy check toward the lower n/2 bits;
• data synthesis means for synthesizing said shifted and saved data and said residue data read out, said data synthesis means generating synthetic data by synthesizing said reside data with one of said shift data and said save data;
• and
• check means for parity check of the data for said cyclic redundancy checking using said residue data finally read out.

A cyclic coding processor for a generator polynomial G(X) of degree m (m is an integer satisfying m.gtoreq.n/2) using a computer for data processing by units of n bits comprising:

• residue table storage means for storing a residue table containing 2.sup.n pieces of residue data having n/2 bits obtained by divisions of 2.sup.n pieces of data having n bits by said generator polynomial;
• data read means for reading out the data having n bits for cyclic coding;
• address generation means for generating addresses of said residue data to be read out from said residue table storage means;
• residue data read means for reading said residue data out of said residue table storage means according to the generated addresses;
• data save means for saving the data for said cyclic coding, said data save means generating save data by saving the lower n/2 bits of the data for said cyclic coding;
• data shift means for shifting the data for said cyclic coding, said data shift means generates the shift data by shifting the higher n/2 bits of the data for said cyclic coding toward the lower n/2 bits;
• and
• data synthesis means for synthesizing said shifted and saved data and said residue data read out, said data synthesis means generating synthetic data by synthesizing said residue data with one of said shift data and said save data, wherein
• said address generation means uses, for a first address generation, n bit data for said cyclic coding read out by said data read means in order to generate said first address for said residue table, and for each the following address generations, the data obtained by synthesis of the residue data having n/2 bits previously read out and n/2 bits of the n bit data for said cyclic coding in order to generate said each of the following address for said residue table.