Method and data processing system for testing circuits using boolean differences

A method for processing a logic circuit model to allow for testing of a logic circuit coupled in accordance with the logic circuit model, the method comprising the steps of:

• parsing the logic circuit model to identify at least one output statement of the logic circuit model wherein the at least one output statement indicates a binary logic output of the logic circuit model as a function of a plurality of Boolean variables wherein the plurality of Boolean variables are logically manipulated by at least one logical operator to form at least one product term;
• building, via the at least one output statement, a product term data structure for both the at least one output statement and an inverse function of the at least one output statement wherein the product term data structure is a binary bit array which identifies the plurality of Boolean variables and how the plurality of Boolean variables are interrelated to form product terms in both the at least one output statement and an inverse function of the at least one output statement;
• storing in memory a Boolean difference set, the Boolean difference set selectively storing a plurality of Boolean differences, which are in accordance with a predetermined test condition, wherein a Boolean difference is formed by logically combining a product term from the product term data structure which corresponds to the at least one output statement and a product term from the product term data structure which corresponds to the inverse function of the at least one output statement;
• and
• using the Boolean difference set to allow for testing of the logic circuit.

A Boolean difference generator comprising:

• means for parsing a logic circuit model to identify at least one output statement of the logic circuit model wherein the at least one output statement indicates a binary logic output of the logic circuit model as a function of a plurality of Boolean variables wherein the plurality of Boolean variables are logically manipulated by at least one logical operator to form at least one product term;
• means for building, via the at least one output statement, a product term data structure for both the at least one output statement and an inverse function of the at least one output statement wherein the product term data structure is a binary bit array which identifies the plurality of Boolean variables and how the plurality of Boolean variables are interrelated to form product terms in both the at least one output statement and an inverse function of the at least one output statement;
• means for storing in memory a Boolean difference set, the Boolean difference set selectively storing a plurality of Boolean differences, which are in accordance with a predetermined test condition;, wherein a Boolean difference is formed by logically combining a product term from the product term data structure which corresponds to the at least one output statement and a product term from the product term data structure which corresponds to the inverse function of the at least one output statement;
• and
• means for accessing the Boolean difference set to aid in testing of the logic circuit.

A method for processing a logic circuit model to allow for testing of a logic circuit coupled in accordance with the logic circuit model, the method comprising the steps of:

• (a) determining a logic path in the logic circuit model which is to be tested for a predetermined logical transition;
• (b) representing the logic path in the logic circuit model as a Boolean function having input variables arranged in product terms and logical operators to operate on the product terms;
• (c) representing the inverse Boolean function of the Boolean function wherein the inverse Boolean function contains inverse product terms;
• (d) defining a set of product terms containing some product terms and some inverse product terms and manipulating the set of product terms to determine if the set of product terms can generate the predetermined logical transition in order to allow testing of the logic path;
• and
• (e) changing, when the predetermined logical transition cannot be generated in step (d), the set of product terms to contain other inverse product terms and other product terms different from the some inverse product terms and some product terms used in step (d), and performing steps (d)-(e) until the predetermined logical transition can be attained or the product terms and inverse product terms have been exhausted.

A method for processing a logic circuit model to allow for testing of a logic circuit coupled in accordance with the logic circuit model, the method comprising the steps of:

• (a) determining a logic path in the logic circuit model which is to be tested for a predetermined logical transition;
• (b) representing the logic path in the logic circuit model as a Boolean function having input variables arranged in product terms and logical operators to operate on the product terms;
• (c) representing the inverse Boolean function of the Boolean function wherein the inverse Boolean function contains inverse product terms;
• (d) using the inverse product terms and the product terms to store a plurality of Boolean differences;
• (e) verifying whether any of the Boolean differences enable the predetermined logic transition by comparing the Boolean differences to predetermined logical constraints;
• and
• (f) selecting one of the Boolean differences as a selected logic constraint when the step (e) verifies that the one of the Boolean differences enables the predetermined logic transition, or else performing steps (d) through (e) to find a plurality of different Boolean differences to analyze until either all product terms and inverse product terms are exhausted or the selected logic constraint is determined.