Semiconductor memory device in which data are read and written asynchronously with application of address signal
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorTsukasa Ooishi
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Abstract
A semiconductor memory device includes an address register circuit for storing a plurality of address signals when an address latch enable signal is active in synchronization with a basic timing signal. When an internal operation start instructing signal is activated, a selected address signal from the address register circuit is supplied to a row decoder and a column decoder for memory cell selection. While an internal memory selection operation is performed, an address signal is stored in the address register circuit. Application of an address signal and a memory accessing is carried out asynchronously.
Claims16
A semiconductor memory device comprising:
- a memory array including a plurality of memory cells;
- decoding means for selecting a memory cell in said memory array in accordance with an applied address signal;
- and
- address storage means for storing a plurality of address signals each designating an address of said memory array when an address latch enable signal is in an active state and for supplying a selected address signal among stored address signals to said decoding means upon activation of an internal operation start instructing signal.
Dependencies are inferred from the claim text.