Non-volatile semiconductor memory device capable of electrically performing read and write operation and method of reading information from the same

A non-volatile semiconductor memory device, comprising:

• a memory cell having a semiconductor-ferroelectric junction capacitor formed by stacking a semiconductor layer and a ferroelectric layer between a pair of electrodes, said semiconductor layer and said ferroelectric layer forming a semiconductor-ferroelectric junction;
• writing means, in response to a voltage which is higher than a coercive electric field of said ferroelectric layer and is applied to said capacitor of said memory cell, for aligning a polarization direction of said ferroelectric layer in one of predetermined up and down directions with respect to a plane of the semiconductor-ferroelectric junction to set a capacitance of said capacitor at a predetermined value corresponding to the polarization direction, and writing data corresponding to the predetermined value of said capacitance;
• and
• reading means, in response to a voltage which is less than the coercive electric field of said ferroelectric layer and is applied to said capacitor of said memory cell in which the data is written, for reading the data, said data corresponding to a charge state of said capacitor;
• wherein said capacitor includes:
• a well region of a first conductivity type formed in a semiconductor substrate of the first conductivity type;
• isolating means for electrically isolating said semiconductor substrate from said well region;
• a first electrode contacting said well region;
• said ferroelectric layer forming a semiconductor-ferroelectric junction with said well region;
• and
• a second electrode contacting said ferroelectric layer.

A non-volatile semiconductor memory device, comprising:

• a memory cell having a capacitor formed by stacking a semiconductor layer and a ferroelectric layer between first and second electrodes to form a semiconductor-ferroelectric junction between said semiconductor layer and said ferroelectric layer, data being stored in said memory call by aligning a polarization direction of said ferroelectric layer in one of predetermined up and down directions with respect to a plane of the semiconductor-ferroelectric junction, wherein the capacitance of said capacitor is changed a detectable amount based on the generation or disappearance of a depletion layer in said semiconductor layer adjacent to said semiconductor-ferroelectric junction and a capacitance of said capacitor is set at a predetermined value corresponding to the polarization direction based on the generator or disappearance of said depletion layer;
• a plate line, connected to said first electrode, for applying a first voltage to said first electrode;
• a bit line for applying a second voltage to said second electrode, data stored in said memory being read out into said bit line during read access;
• first switching means connected between said second electrode and said bit line;
• a word line for supplying a first switching signal to said first switching means;
• supply means for supplying a voltage higher than a coercive electric field of said ferroelectric layer to said second electrode during write access and supplying a voltage lower than a coercive electric field of said ferroelectric layer to said second electrode during read access;
• second switching means connected between said second electrode and said supply means;
• and
• a selection line for supplying a second switching signal to said second switching means.

Method for reading an information from a non-volatile semiconductor memory device, said memory device including:

• a memory cell having a capacitor formed by stacking a semiconductor layer and a ferroelectric layer between first and second electrodes to form a semiconductor-ferroelectric junction between said semiconductor layer and said ferroelectric layer, data being stored in said memory cell by aligning a polarization direction of said ferroelectric layer in one of predetermined up and down directions with respect to a plane of the semiconductor-ferroelectric junction, wherein the capacitance of said capacitor is changed a detectable amount based on the generation or disappearance of a depletion layer in said semiconductor layer adjacent to said semiconductor-ferroelectric junction and a capacitance of said capacitor is set at a predetermined value corresponding to the polarization direction;
• a plate line, connected to said first electrode, for applying a first voltage to said first electrode;
• a bit line for applying a second voltage to said second electrode, data stored in said memory being read out into said bit line during read access;
• first switching means connected between said second electrode and said bit line;
• a word line for supplying a first switching signal to said first switching means;
• supply means for supplying a voltage higher than a coercive electric field of said ferroelectric layer to said second electrode during write access and supplying a voltage lower than a coercive electric field of said ferroelectric layer to said second electrode during read access;
• second switching means connected between said second electrode and said supply means;
• and a
• selection line for supplying a second switching signal to said second switching means,
• said method comprising the steps of:
• setting a voltage of said bit line at a reference voltage;
• turning said second switching means on to apply a voltage lower than said coercive electric field of said ferroelectric layer to said second electrode;
• and
• turning said first switching means on to read out said data stored in said memory into said bit line.