High resolution gain response correction circuit

Abstract

A high resolution gain response correction circuit. The inventive circuit (10) is adapted for use with a first circuit for providing a first analog input signal and includes a second circuit (R.sub.p, R.sub.ref) for providing a second input signal in response to the first input signal. A third circuit (12) is included for providing an analog output signal in response to the first and second input signals. In a particular implementation, the third circuit is a digital-to-analog converter (12). The digital-to-analog converter (12) is adapted to adjust the output signal level in response to an individual pixel correction reference signal. A digital potentiometer (R.sub.p) allows for the first input signal to be scaled and used to adjust the level of the second input signal. By adjusting the setting of the potentiometer, the dynamic range of the output to the digital-to-analog converter may be adjusted. Hence, the inventive arrangement allows for the gain correction range of a digital-to-analog converter to be matched to a particular array under test via software control.

Dependencies are inferred from the claim text.