Power-on reset circuit
AssigneeSony Corporation
InventorKatsuya Nakashima
Life of this patent
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Abstract
A power-on reset circuit provides the stable generation of a reset signal without being affected by the rising characteristic of a power-supply voltage. A flip-flop having a pair of cross-connected inverters is used, a common connection point between a diode and a capacitor connected to each other in series is connected to a node, which is one output of the flip-flop, an output signal at a node, which is another output of the flip-flip, is supplied to a reset pulse generator via an inverter, so that a reset pulse is generated based on a detected output signal change.
Claims16
A power-on reset circuit comprising:
- a first power supply;
- a second power supply;
- a flip-flop having a pair of cross-connected inverters each comprising a driving transistor, a diode-connected device, and a load connected in series between said first power supply and said second power supply, an output of one of said pair of inverters providing an input to the other of said pair of inverters and an output of said other of said pair of inverters providing an input to said one of said pair of inverters, wherein when the first power supply is low, an impedance of the driving transistor and diode-connected device of each of said pair of inverters is sufficiently higher than that of the loads of each of the inverters so that the flip-flop has only one stable point, and when the potential of the first power supply is sufficiently high to cause at least one of the transistors in either of said pair of inverters to turn on, an output of the flip-flop is inverted;
- a series-connected circuit composed of a diode device and a capacitor connected to each other in series between said first power supply and said second power supply, a common connection point between said diode device and said capacitor being connected to the output of one of said inverters of said flip-flop;
- and
- a reset signal generator for generating a reset signal based on a change in an output signal of one of said inverters of said flip-flop.
A power-on reset circuit, comprising:
- a first power supply Vcc;
- a second power supply;
- a first inverter having an input and an output and connected between said first power supply and said second power supply, said first inverter comprising a first load resistor, a first driving transistor, and a first diode device respectively connected in series between said first power supply and said second power supply;
- a second inverter having an input and an output and connected between said first power supply and said second power supply, said second inverter comprising a second load resistor, a second driving transistor, and a second diode device respectively connected between said second power supply and said first power supply, wherein said first inverter and said second inverter are cross-connected to each other to constitute a flip-flop wherein the output of said first inverter is provided as the input to said second inverter, and the output of said second inverter is provided as the input to said first inverter;
- an input circuit having a connection node connected to the output of said first inverter;
- and
- a reset pulse generator connected to the output of said second inverter, for generating a reset pulse based on a difference between said second inverter output and a delayed signal based on said second inverter output.
Dependencies are inferred from the claim text.