Method and apparatus for operating polyphase DC motors using a PWM chopping signal in zero crossing determination

A circuit for operating a sensorless polyphase dc motor having a plurality of driving coils in a non-PWM operating mode and in a PWM mode, comprising:

• a commutation sequencer for producing signals according to a commutation sequence having a plurality of phases to identify which of said driving coils are to be active to receive instantaneous drive currents and which are to be connected into a floating state;
• drive circuitry for connecting said coils to receive the instantaneous drive currents and into the floating state in accordance with the signals from said commutation sequencer;
• circuitry for detecting zero crossings of a back emf voltage of the one of the plurality of driving coils that is connected into the floating state in each phase to produce a back emf detection signal;
• circuitry responsive to the back emf detection signal for producing a delayed signal to increment the commutation sequencer to a next phase in the commutation sequence;
• circuitry for generating a chop signal when the current in said active coils exceeds a predetermined threshold;
• circuitry, operable in the PWM mode, for turning the drive currents supplied to the selected active coils on and off to modulate the drive currents in accordance with said chop signal;
• and
• circuitry, operable in the PWM mode, for delaying detection of zero crossings according to said chop signal, said delaying circuitry being disabled from delaying such detection in the non-PWM operating mode.

A method for operating a polyphase dc motor having a plurality of driving coils, comprising:

• chopping drive current supplied to said driving coils to control the maximum current delivered thereto by turning the drive current on and off a plurality of times within each phase of a commutation sequence;
• detecting zero crossings of a back emf voltage of said driving coils that are connected into a floating state for producing a commutation signal;
• and
• inhibiting the detection of zero crossings for a predetermined time relative to said chopping step to avoid detecting a false zero crossing, said inhibiting occurring a plurality of times within each phase of the commutation sequence.