Limitation of current absorption under short-to-plus unpowered conditions of the output node of an amplifier
AssigneeSGS-Thomson Microelectronics S.A.
InventorsEdoardo Botti, Andrea Fassina, Paolo Ferrari
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AssigneeSGS-Thomson Microelectronics S.A.
InventorsEdoardo Botti, Andrea Fassina, Paolo Ferrari
Estimating the term…
A transistor in an output stage has an emitter connected to a supply rail and a collector connected to an output node. The transistor is protected against the effects of accidental shortcircuiting of the output node of the output stage with a positive pole of a battery while the circuit is unpowered, by a protection transistor of the same type as the transistor to be protected. The protection transistor has an emitter connected to the base of the output transistor, a collector connected to the output node of the output stage, and a base connected through a biasing resistance to the supply rail on the output stage. The protection transistor and an interdigitated structure of the transistor may be formed within the same pocket, thus reducing the required area.
A protection circuit for protecting an output stage against a short-to-plus unpowered (SPU) condition at an output node of the output stage, the output stage having a first transistor with a base, an emitter connected to a supply rail, and a collector connected to the output node, the protection circuit comprising:
A circuit comprising:
A method for protecting a transistor of an output stage having an output node from a shortcircuiting of the output node to a power source, the transistor having a collector coupled to the output node, and a base, the method comprising steps of:
A protection circuit for protecting an output stage against a short-to-plus unpowered (SPU) condition, the output stage having a first transistor with a base, an emitter connected to a supply rail, and a collector connected to an output node, the protection circuit comprising:
Dependencies are inferred from the claim text.
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No related US applications are recorded in the indexed filing history.
Term ended 7 Feb 2014 (estimated)
USPTO file history isn’t available for this patent, so only indexed dates are shown.
1. Field of the Invention
The present invention relates to a power amplifier which is to be connected and powered by a DC battery, and which is provided with circuitry for preventing destructive breakdown that may be caused by inadvertently connecting the DC supply to the output terminal of the amplifier while the amplifier is unpowered.
2. Discussion of the Related Art
The different aspects and advantages of the present invention will become clearer through the following description of several important embodiments and by referring to the attached drawings, wherein:
FIG. 1 is an electrical schematic of an accidental SPU condition.
FIG. 2 is a schematic of an output stage of an amplifier that is more subject to a destructive breakdown as a consequence of the occurrence of an SPU condition;
The problem of a reverse bias condition of the output power transistor Q1, connected to the supply rail of an output stage under an SPU condition, as depicted in FIGS. 1 and 2, may be substantially reduced or eliminated by shortcircuiting through a protection switch S1 the virtual base-emitter (B)/(E) junction of the transistor. Protecting switch S1 may be switched by a sensor which can detect the occurrence of an SPU condition due to an erroneous connection to the output node (Out) of the amplifier of the supply battery voltage, when the circuit is unpowered.
An embodiment for detecting an SPU condition and for a shortcircuiting the (B)/(E) junction of the transistor at risk is depicted in FIG. 4. The protection device, according to this embodiment, includes a transistor QS having an emitter connected to the base (B1) of the power transistor Q1, a collector connected to the output node (Out), and a base (B2) connected, through a biasing resistance RP2, to the supply rail Vcc of the amplifier circuit.
During normal functioning of the circuit, the protection transistor QS, which is substantially the same as the power transistor Q1 to be protected, is OFF, because the potential on the base (node B2) is higher than the potentials on the emitter and the collector nodes. In fact, the base potential is substantially equal to supply voltage Vcc of the amplifier.