Digital automatic frequency control method and circuit therefor
AssigneeSamsung Electronics Co., Ltd.
InventorTong-ha Kim
Life of this patent
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Abstract
A digital automatic frequency controlling method and circuit therefor in which a digital horizontal sync signal is separated from an input horizontal sync signal in response to a system clock, a horizontal sync separation point value is extracted, an actual horizontal sync period is calculated by using the digital horizontal sync signal and the clock pulse number within one horizontal sync period, a line jitter amount is calculated by subtracting a standard horizontal sync period from the actual horizontal sync period, a correction coefficient in response to the line jitter amount is generated to modulo-operate a standard frequency down-converting carrier color signal and to thereby generate a new frequency down-converting carrier color signal having compensated line jitter.
Claims16
A digital automatic frequency controlling method comprising the steps of:
- (a) separating a digital horizontal sync signal from an input horizontal sync signal in response to a system clock, extracting a horizontal sync separation point value, and detecting the number of clock pulses within one horizontal sync period;
- (b) calculating an actual horizontal sync period using said digital horizontal sync signal, said horizontal sync separation point value and said clock pulse number within one horizontal sync period, and calculating a line jitter amount by subtracting a standard horizontal sync period from said actual horizontal sync period;
- and
- (c) modulo-operating a standard frequency down-converting carrier color signal in response to said line jitter amount, and thereby generating a new frequency-corrected frequency down-converting carrier color signal.
In a method of controlling varying the frequency of a frequency down-converting carrier color signal according to a horizontal sync frequency so as to control the frequency automatically, a digital automatic frequency controlling method comprising the steps of:
- (a) initializing a horizontal sync separation error of a previous line;
- (b) separating a digital horizontal sync signal from an input horizontal sync signal based on a predetermined level and in response to a system clock with respect to a horizontal sync period of the input horizontal sync signal, and calculating the number of system clock pulses corresponding to a digital horizontal sync period;
- (c) calculating a horizontal sync separation error of the present line based on a first transition of said system clock immediately preceding separation of the digital horizontal sync signal and the following system clock transition in the same direction immediately following said separation;
- (d) calculating the horizontal sync period of the actual line using said system clock pulse number, the horizontal sync separation error of said present line, and the horizontal sync separation error of the previous line;
- (e) subtracting a predetermined standard horizontal sync period from said actual horizontal sync period calculated in said horizontal sync period calculating step, and thereby calculating the jitter amount of said present line;
- (f) deciding the degree of correction of said frequency down-converting carrier color signal in response to said jitter amount;
- (g) calculating a correction coefficient corresponding to said correction degree;
- and
- (h) modulo-operating said frequency down-converting carrier color signal by using said correction coefficient, and thereby generating a new frequency down-converting carrier color signal.
A digital automatic frequency controlling circuit comprising:
- a horizontal sync signal converter for separating a digital horizontal sync signal from an input horizontal sync signal in response to a system clock, extracting a horizontal sync separation point value, and detecting the number of clock pulses within one horizontal sync period;
- a line jitter amount calculator for calculating an actual horizontal sync period by using said digital horizontal sync signal, said horizontal sync separation point value and said clock pulse number within one horizontal sync period, all of which are output from said horizontal sync converter, and calculating a line jitter amount by subtracting a standard horizontal sync period from said actual horizontal sync period;
- and
- a corrected-carrier color signal output unit for modulo-operating a standard frequency down-converting carrier color signal in response to said line jitter amount output from said line jitter amount calculator, and thereby generating a frequency-corrected frequency down-converting carrier color signal.
Dependencies are inferred from the claim text.