Digital regenerative comparator
AssigneeAdvanced Micro Devices, Inc.
InventorSergio R. Ramirez
Life of this patent
Estimating the term…
Abstract
A regenerative comparator provides the capability of operating faster than a traditional regenerative comparator and the hysteresis points can be individually set and fine tuned. The regenerative comparator includes a current mirror having an input transistor connected to first and second output transistors, a first and second reference current sources which are set at a first and second predetermined level, respectively. An outputs of the first and second output transistors are provided to the latch through an inverter. The output of the latch transitions from a first logical output state to a second logical output state when an input current increases from a magnitude less than the first predetermined level to a magnitude greater than the first predetermined level.
Claims6
A regenerative comparator comprising:
- a current mirror having an input transistor connected to first and second output transistors, the input transistor being connected to an input current, the first output transistor being connected to a first node, the second output transistor being connected to a second node;
- a first reference current source connected to the first node, the first reference current source being set at a first predetermined level;
- a second reference current source connected to the second node, the second reference current source being set at a second predetermined level;
- a latch having an output, a first input connected to the first node and a second input connected to an output of an inverter, an input of the inverter being connected to the second node;
- and
- wherein the output of the latch transitions from a first logical output state to a second logical output state when the input current increases from a magnitude less than the first predetermined level to a magnitude greater than the first predetermined level.
A regenerative comparator comprising:
- a current mirror having an input transistor connected to first and second output transistors, the input transistor being connected to an input current, the first output transistor being connected to a first node, the second output transistor being connected to a second node;
- a first reference current source connected between the first node and ground, the first reference current source being set at a first predetermined level;
- a second reference current source connected between the second node and the ground, the second reference current source being set at a second predetermined level;
- a latch having an output, a SET input connected to the first node and a RESET input connected to an output Of an inverter, an input of the inverter being connected to the second node;
- wherein the output of the latch transitions from a LOW level to a HIGH level when the input current increases from a magnitude less than the first predetermined level to a magnitude greater than the first predetermined level.
Dependencies are inferred from the claim text.