Reset dominant level-shift circuit for noise immunity
AssigneeInternational Rectifier Corporation
InventorsDavid C. Tam, Chongwook C. Choi
Life of this patent
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Abstract
The logic circuit of the level shifting circuit of a high side MOS gate device is made reset dominant to make the circuit immune to noise glitches. The reset dominance is obtained by causing a reset signal to be produced at a wider range of high side floating supply offset voltage than that at which the set signal can be produced to prevent the chance of a set when the high side power MOSFET should be off. The reset dominance is obtained by increasing the size of the reset voltage dropping resistor or by adjusting the input threshold of the circuit reading the set and reset voltage dropping resistors.
Claims10
A reset-dominant level-shifting circuit for translating a logic voltage state from one voltage level to a different voltage level;
- said level-shifting circuit comprising a set level circuit for producing an output signal for turning on a power MOSFET and a reset level circuit for turning off said power MOSFET;
- a pulse generator for producing a reset signal coupled to said reset level circuit and a set level signal coupled to said set level circuit which are in response to input signals to said pulse generator;
- and reset-dominant circuit means connected to said reset level circuit for operating said reset level circuit to turn off said power MOSFET with a lower input signal than is required to operate said set level circuit.
Dependencies are inferred from the claim text.