Video memory clock selection circuit and method

A method of varying a video memory clock signal as a function of video memory configuration, comprising the steps of:

• inserting a circuit board into a computer system as a daughter-card, said circuit board containing a plurality of video memory chips having a particular logical configuration and a configuration indication circuit;
• transmitting a configuration signal representing said particular logical configuration from said indication circuit to video clock signal generator circuitry in said computer system;
• and
• generating said video memory clock signal having a frequency that is a function of said configuration signal.

A computer system, comprising:

• a microprocessor central processing unit (CPU);
• video memory located in a removable module and coupled to said microprocessor CPU, said video memory having a particular configuration;
• a first circuit located in said removable module for generating a memory configuration signal representing said particular configuration of said video memory;
• a second circuit for receiving said configuration signal from said first circuit and generating, in response thereto, a configuration-dependent video memory clock signal that varies as a function of said configuration signal;
• and
• a third circuit for scanning said video memory at a rate determined by said video memory clock signal.

A method of generating a video memory configuration-dependent clock signal in a computer system, comprising the steps of:

• providing a microprocessor central processing unit (CPU);
• coupling a video memory to said microprocessor CPU, said video memory located in a removable module and having a particular configuration;
• generating a memory configuration signal representing said particular configuration of said video memory with a first circuit located in said removable module;
• receiving said configuration signal from said first circuit into a second circuit, said second circuit generating, in response thereto, a configuration-dependent video memory clock signal that varies as a function of said configuration signal;
• and
• scanning said video memory with a third circuit at a rate determined by said video memory clock signal.

A personal computer (PC), comprising:

• a microprocessor central processing unit (CPU);
• a video memory module coupled to said microprocessor CPU, said video memory having a particular configuration and for being coupled to and decoupled from said CPU as a module;
• a hard-wired memory configuration circuit within said video memory module for generating a memory configuration signal representing said particular configuration of said video memory on a plurality of clock select lines on said video memory module;
• a video clock generator circuit coupled to said plurality of clock select lines, for receiving said memory configuration signal from said memory configuration circuit and generating, in response thereto, a configuration-dependent video memory clock signal that varies as a function of said configuration signal;
• and
• a video controller circuit for scanning said video memory at a rate determined by said video memory clock signal.

A method of scanning video memory in a personal computer (PC), comprising the steps of:

• providing a microprocessor central processing unit (CPU);
• coupling a video memory module to said microprocessor CPU, said video memory having a particular configuration and for being coupled to and decoupled from said CPU as a module;
• generating a memory configuration signal with a hard-wired memory configuration circuit within said video memory module, said memory configuration signal representing said particular configuration of said video memory on a plurality of clock select lines on said video memory module;
• receiving said memory configuration signal from said memory configuration circuit into a video clock generator circuit coupled to said plurality of clock select lines, said video clock generator circuit generating, in response thereto, a configuration-dependent video memory clock signal that varies as a function of said configuration signal;
• and
• scanning said video memory at a rate determined by said video memory clock signal with a video controller circuit.