Multiprocessor system discharging data in networking apparatus in response to off-line information from receiver-side processor

A multi-processor system comprising:

• a networking apparatus;
• and
• a plurality of processors for transferring data through the networking apparatus from one of the plurality of processors to another of the plurality of processors, wherein
• at least one first processor among the plurality of processors comprises transmitting means, connected to the networking apparatus, for transmitting data to the networking apparatus,
• at least one second processor among the plurality of processors comprises:
• receiving means, connected to the networking apparatus, for receiving data transferred from the networking apparatus,
• transfer allowance signal transmitting means for transmitting a transfer allowance signal to the networking apparatus when the receiving means is ready to receive data and the at least one second processor is in an on-line state, and
• on-line/off-line signal transmitting means for transmitting an on-line/off-line signal to the networking apparatus, the on-line/off-line signal indicating by a voltage level thereof whether the at least one second processor is in one of the on-line state and an off-line state;
• said networking apparatus comprising:
• switch means for providing a route for transferring data between each of the at least one first processor and a respective one of the at least one second processor corresponding to each first processor,
• data transfer control means, provided corresponding to each of said at least one second processor, on an output side of said switch means and, on each route for transferring data, for receiving from said switch means the data transferred between one of the at least one first processor connected to the route and one of the at least one second processor corresponding to said one of the at least one first processor, temporarily storing the data, and transferring the data to said one of the at least one second processor connected to the route, when the data transfer control means receives the transfer allowance signal from the second processor, and
• off-line state detecting means, provided corresponding to each of said data transfer control means, for receiving the on-line/off-line signal, directly from said one of the at least one second processor connected to the route, detecting said voltage level of the on-line/off-line signal, and generating and outputting a data discharge control signal to the data transfer control means, when the on-line/off-line signal indicates that the at least one second processor is in the off-line state;
• and
• the data transfer control means further comprises data discharge means for receiving the data discharge control signal, and for discharging the data temporarily stored in the data transfer control means in response to the data discharge control signal, regardless of the transfer allowance signal.