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AssigneeInternational Business Machines Corporation
InventorsRam Kelkar, Ilya I. Novof, Donald E. Strayer, Stephen D. Wyatt
Estimating the term…
A phase locked loop circuit includes a phase/frequency detector which uses a divider circuit and feedback from a clock distribution tree to generate INC and DEC pulses which have no "dead zone". A pair of charge pumps receives the INC and DEC pulses. One charge pump is a differential pump and has voltage controlled common mode feedback circuit to maintain a common mode controlled voltage. A differential current is outputted to a loop filter capacitor by this charge pump. The other charge pump is a single-ended output pump which supplies current to a current controlled oscillator which also receives input from a voltage to current converter. The current controlled oscillator includes a variable resistance load which varies inversely with the magnitude of the input current. A jitter control circuit is provided which reduces jitter in the current controlled oscillator output in the locked phase. Also, a lock indicator is provided which is time independent, and provides a lock indication when the loop enters the locked condition. The circuits for these components are described in detail.
In a phase locked loop circuit including a phase/frequency detector which receives a reference clock signal and the phase locked loop circuit output signal as inputs thereto, and which phase/frequency detector outputs increment and decrement pulses having widths responsive to a phase difference between the reference clock signal and the phase locked loop circuit output signal, a voltage to current converter, a loop filter capacitor connected to the input of the voltage to current converter, a current controlled oscillator, the input of which is connected to the output of the voltage to current converter;
In a phase locked loop circuit including a phase/frequency detector which receives a reference clock signal and the phase locked loop circuit output signal as inputs thereto, and which phase/frequency detector outputs increment and decrement pulses having widths responsive to a phase difference between the reference clock signal and the phase locked loop circuit output signal, a voltage to current converter, a loop filter capacitor connected to the input of the voltage to current converter, a current controlled oscillator, the input of which is connected to the output of the voltage to current converter, and
Dependencies are inferred from the claim text.