Asynchronous transfer mode (ATM) cell error processing system

An Asynchronous Transfer Mode (ATM) cell error processing system for processing errors in ATM cells, said ATM error processing system comprising:

• a plurality of error detection means for receiving said ATM cells, for detecting predetermined cell errors in each of said ATM cells and for generating respective and corresponding decision signals for said each ATM cell, said respective and corresponding decision signals indicative of whether any of said predetermined cell errors are present in said each ATM cell;
• error editing means, operatively coupled to at least one of said plurality of error detection means, for determining for each of said ATM cells whether, based on the respective and corresponding decision signals, a respective ATM cell should be discarded;
• buffer means, coupled to at least one of the plurality of error detection means, for temporarily storing at least one of said ATM cells;
• and
• error cell discarding means, coupled to said error editing means and said buffer means, for discarding said respective ATM cell from said buffer means when said error editing means determines, based on said respective and corresponding decision signals, that said respective ATM cell should be discarded and for transferring said respective ATM cell to an ATM switching network when said error editing means determines, based on said respective and corresponding decision signal, that said respective ATM cell should not be discarded,
• the plurality of error detection means being connected in parallel, each error detection means coupled to said error editing means, and
• each ATM cell being simultaneously supplied to the plurality of error detection means and said buffer means.

An Asynchronous Transfer Mode (ATM) cell error processing system, for processing errors in ATM cells, said ATM cell error processing system comprising:

• a plurality of error detection means for receiving said ATM cells, for detecting predetermined cell errors in each of said ATM cells and for generating respective and corresponding decision signals for said each ATM cell, said respective and corresponding decision signals indicative of whether any of said predetermined cell errors are present in said each ATM cell;
• error editing means, operatively coupled to at least one of said plurality of error detection means, for determining for each of said ATM cells whether, based on the respective and corresponding decision signals, a respective ATM cell should be discarded;
• buffer means, coupled to at least one of the plurality of error detection means, for temporarily storing at least one of said ATM cells;
• error cell discarding means, coupled to said error editing means and said buffer means, for discarding said respective ATM cell from said buffer means when said error editing means determines, based on said respective and corresponding decision signals, that said respective ATM cell should be discarded and for transferring said respective ATM cell to an ATM switching network when said error editing means determines, based on said respective and corresponding decision signal, that said respective ATM cell should not be discarded;
• and
• transfer means for transferring the respective and corresponding decision signals to said error editing means via a first signal line coupled between said transfer means and said error editing means, and said respective ATM cell via a second signal line coupled between said transfer means and said error editing means, different than said first signal line.

An Asynchronous Transfer Mode (ATM) cell error processing system, for processing errors in ATM cells, said ATM cell error processing system comprising:

• a plurality of error detection means for receiving said ATM cells, for detecting predetermined cell errors in each of said ATM cells and for generating respective and corresponding decision signals for said each ATM cell, said respective and corresponding decision signals indicative of whether any of said predetermined cell errors are present in said each ATM cell;
• error editing means, operatively coupled to at least one of said plurality of error detection means, for determining for each of said ATM cells whether, based on the respective and corresponding decision signals, a respective ATM cell should be discarded;
• buffer means, coupled to at least one of the plurality of error detection means, for temporarily storing at least one of said ATM cells;
• and
• error cell discarding means, coupled to said error editing means and said buffer means, for discarding said respective ATM cell from said buffer means when said error editing means determines, based on said respective and corresponding decision signals, that said respective ATM cell should be discarded and for transferring said respective ATM cell to an ATM switching network when said error editing means determines, based on said respective and corresponding decision signal, that said respective ATM cell should not be discarded,
• said error editing means comprising logic means for executing a predetermined logic operation on said respective and corresponding decision signals and obtaining a result, and for determining whether said respective ATM cell should be discarded based on the result of said predetermined logic operation.

An Asynchronous Transfer Mode (ATM) cell error processing system for processing errors in ATM cells, said ATM cell error processing system comprising:

• a plurality of error detection means for receiving said ATM cells, for detecting predetermined cell errors in each of said ATM cells and for generating respective and corresponding decision signals for said each ATM cell, said respective and corresponding decision signals indicative of whether any of said predetermined cell errors are present in said each ATM cell;
• error editing means, operatively coupled to at least one of said plurality of error detection means, for determining for each of said ATM cells whether, based on the respective and corresponding decision signals, a respective ATM cell should be discarded, said error editing means comprising:
• error register means for storing said respective and corresponding decision signals transferred from the plurality of error detection means,
• masking logic means, coupled to said error register means, for receiving said respective and corresponding decision signals, for executing a masking logic operation on said respective and corresponding decision signals from said error register means and error masking information, and selecting decision signals from all of said respective and corresponding decision signals from said error register means, based on said error masking information, and
• cell discarding logic means, coupled to said masking logic means, for executing a cell discarding logic operation based on the respective and corresponding decision signals selected by said masking logic means;
• buffer means, coupled to at least one of the plurality of error detection means, for temporarily storing at least one of said ATM cells;
• and
• error cell discarding means, coupled to said error editing means and said buffer means, for discarding said respective ATM cell from said buffer means when said error editing means determines, based on said respective and corresponding decision signals, that said respective ATM cell should be discarded and for transferring said respective ATM cell to an ATM switching network when said error editing means determines, based on said respective and corresponding decision signal, that said respective ATM cell should not be discarded.

An Asynchronous Transfer Mode (ATM) cell error processing system for processing errors in ATM cells, said ATM cell error processing system comprising:

• a plurality of error detection means for receiving said ATM cells, for detecting predetermined cell errors in each of said ATM cells and for generating respective and corresponding decision signals for said each ATM cell, said respective and corresponding decision signals indicative of whether any of said predetermined cell errors are present in said each ATM cell;
• error editing means, operatively coupled to at least one of said plurality of error detection means, for determining for each of said ATM cells whether, based on the respective and corresponding decision signals, a respective ATM cell should be discarded;
• buffer means, coupled to at least one of the plurality of error detection means, for temporarily storing at least one of said ATM cells;
• and
• error cell discarding means, coupled to said error editing means and said buffer means, for discarding said respective ATM cell from said buffer means when said error editing means determines, based on said respective and corresponding decision signals, that said respective ATM cell should be discarded and for transferring said respective ATM cell to an ATM switching network when said error editing means determines, based on said respective and corresponding decision signal, that said respective ATM cell should not be discarded.

An Asynchronous Transfer Mode (ATM) system including an ATM switch performing switching between ATM cells, and a message processing unit coupled to said ATM switch, for performing an exchanging operation between the ATM cells and a message of an upper layer, said message processing unit including an ATM cell error processing system which detects errors introduced during the exchanging operation, said ATM cell error processing system comprising:

• a plurality of error detection means for detecting predetermined cell errors in said ATM cells and for generating decision signals indicative of whether any of said predetermining cell errors are present in each of said ATM cells, each of said plurality of error detection means detecting at least one of said predetermined cell errors for a respective ATM cell and generating a respective decision signal;
• error editing means, operatively coupled to said plurality of error detection means, for determining for each of said ATM cells whether, based on the respective decision signal, a respective ATM cell should be discarded;
• buffer means, coupled to at least one error detection means of the plurality of error detection means, for temporarily storing at least one ATM cell of said ATM cells;
• and
• error cell discarding means, coupled to said error editing means and said buffer means, for discarding the at least one ATM cell of said ATM cells from said buffer means when said error editing means determines, based on said respective decision signal, that said at least one ATM cell should be discarded and for transferring said at least one ATM cell when said error editing means determines, based on said respective decision signal, that said at least one ATM cell should not be discarded.