ATM shared memory switch with content addressing

An asynchronous transfer mode switch having a shared memory controlled by a content addressable memory, comprising:

• a plurality of input ports to receive cells of data serially, including means to store temporarily said cells until all bits are received;
• a header processor to receive the headers of said cells serially, including means to store temporarily said headers until all bits are received;
• said header processor having means to assign arrival numbers to said cells;
• means to store priority, broadcast and destination bits from said headers;
• random access memory means to receive said cells of data from said temporary storage and to store said cells;
• means to store available addresses in said random access memory means, and to supply said addresses to said random access memory means;
• a content addressable memory to store the priority, arrival number, and destination output port of each cell stored in said random access memory;
• means to systematically search said content addressable memory with all possible combinations of priority codes, arrival numbers and destination output ports to determine the order of priority for outputting cells from said random access memory;
• means to determine the addresses in said random access memory of cells to be outputted in order of priority;
• and
• means to readout said cells to their destination output ports serially.

A method of switching cells in an asynchronous transfer mode switch having a shared memory controlled by a content addressable memory, wherein a plurality of cells are to be switched through a single output port comprising the steps of:

• receiving a plurality of data cells serially and transferring each of said cells in parallel to a random access memory for storage;
• processing the header of each cell and assigning an arrival number to determine its priority and output port destination;
• storing said arrival number, priority and output port destination in a content addressable memory;
• assigning and storing an address in said random access memory for each incoming cell;
• searching said content addressable memory for all combinations of priority, output port destination and arrival number in order of priority;
• retrieving the random access memory address for each match found in said content addressable memory;
• reading out the cell stored at said random access memory address for outputting at its destination port.