US 5,513,076 AGranted

Multi-level assemblies for interconnecting integrated circuits

AssigneeInterconnect Systems, Inc.

InventorWilliam E. Werther

Life of this patent

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Abstract

Assemblies and methods for interconnecting integrated circuits, particularly prepackaged ones, are disclosed. A multi-level electrical assembly--composed of a pin carrier, a set of pads, such as for receiving a surface-mounted integrated circuit, and a set of conductive pathways coupling the pads and the pins--can connect one or more integrated circuits to the socket or other attachment area of a circuit board. The pathways pass through a multi-layered interconnect board, which can be configured to permit any translation of pads to pins for different purposes, or to permit the coupling of additional circuit elements, such as a coprocessor or passive circuits, to the pathways. Inventive methods for forming the assemblies, and inventive systems in which the embodiment of the assembly can be used to increase circuit board density, are also disclosed.

Claims36

Dependent claims

A multi-level electrical assembly for coupling at least one integrated circuit having a plurality of electrically conductive leads to at least one attachment area of a circuit board comprising:

(a) an interconnect board, comprising an electrically insulating printed circuit board having a top surface, a flat bottom surface, and a plurality of holes;
(b) a pin carrier, comprised of an electrically insulating, homogeneous, plastic material, disposed generally parallel to the interconnect board and including a plurality of plastic locator posts that are aligned with the holes of the interconnect board;
(c) a plurality of electrically conductive pins extending through the pin carrier and held by the pin carrier parallel to each other, perpendicular with the pin carrier, and in relative positions predetermined so as to align with receptacles of a circuit board and measured relative to the locator posts;
(d) a plurality of electrically conductive receiving devices comprising a first set of pads configured to receive leads of an integrated circuit supported on one of the surfaces of the interconnect board;
(e) a second plurality of electrically conductive flat pads on the bottom surface of the interconnect board, each of which are placed at a measured position relative to the holes of the interconnect board;
(f) a plurality of contacts comprising surface-attach joints that electrically couple ends of selected of the pins to the pads and physically holding the pin ends against the pads, wherein no portion of the pins extends beyond the flat bottom surface of the interconnect board;
and
(g) a plurality of electrically conductive pathways, at least in part supported by the interconnect board, at least some of which pathways electrically couple at least one of the contacts to at least one of the receiving devices.

5 more elements

A multi-level electrical assembly for coupling at least one integrated circuit having a plurality of electrically conductive leads to at least one attachment area of a circuit board comprising:

(a) an interconnect board, comprising an electrically insulating printed circuit board having a top surface and a flat bottom surface and three cores;
(b) a pin carrier consisting of an electrically insulating, homogeneous, organic material disposed generally parallel to the interconnect board;
(c) a plurality of electrically conductive pins held by the pin carrier parallel to each other, perpendicular with the pin carrier, and in relative positions predetermined so as to align with receptacles of a circuit board;
(d) a plurality of electrically conductive receiving devices configured to receive leads of an integrated circuit supported on one of the surfaces of the interconnect board;
(e) a plurality of electrically conductive flat pads on the bottom surface of the interconnect board;
(f) a plurality of contacts electrically coupling ends of selected of the pins to the pads and physically holding the pin ends against the pads, wherein no portion of the pins extends beyond the fiat bottom surface of the interconnect board;
and
(g) a plurality of electrically conductive pathways, at least in part supported by the interconnect board, at least some of which pathways electrically couple at least one of the contacts to at least one of the receiving devices, and wherein the electrically conductive pathways form four distinct patterns on (i) the top surface of the interconnect board, (ii) the bottom surface of the interconnect board, and (iii) two intermediate surfaces of the interconnect board.

5 more elements

A multi-level electrical assembly for coupling at least one integrated circuit having a plurality of electrically conductive leads to at least one attachment area of a circuit board comprising:

(a) an interconnect board, comprising an electrically insulating printed circuit board having a top surface and a fiat bottom surface;
(b) a pin carrier consisting of an electrically insulating, homogeneous, organic material disposed generally parallel to the interconnect board;
(c) a plurality of electrically conductive pins held by the pin carrier parallel to each other, perpendicular with the pin carrier, and in relative positions predetermined so as to align with receiving devices of a circuit board;
(d) a socket having a plurality of electrically conductive receptacles sized and positioned to hold pins of an integrated circuit, supported on one of the surfaces of the interconnect board;
(e) a plurality of electrically conductive flat pads on the bottom surface of the interconnect board;
(f) a plurality of contacts electrically coupling ends of selected of the pins to the pads and physically holding the pin ends against the pads, wherein no portion of the pins extends beyond the flat bottom surface of the interconnect board;
and
(g) a plurality of electrically conductive pathways, at least in part supported by the interconnect board, at least some of which pathways electrically couple at least one of the contacts to at least one of the receptacles.

5 more elements

Dependencies are inferred from the claim text.

Facts

Application: 08/483,929Filed 7 Jun 1995 · continuation
Priority: 30 Dec 1992
Granted: 30 Apr 1996
Term ends: Not estimatedThe source records don’t support an estimate.

Classification23 codes

H05K 1/141
Structural association of two or more printed circuits: one or more single auxiliary printed circuits mounted on a main printed circuit, e.g.…
H05K 3/3415
Surface mounted components: on both sides of the substrate or combined with lead-in-hole components
H05K 7/1084
Co-operating by sliding: pin grid array package carriers
H05K 7/1092
Plug-in assemblages of components , e.g. IC sockets: with built-in components, e.g. intelligent sockets