Rate converter for converting data rate
AssigneeSony Corporation
InventorsHiromasa Ikeyama, Takashi Asaida
Life of this patent
Estimating the term…
Abstract
A rate converter for converting data rate is adapted to hold, at an output clock rate, by using a plurality of latch circuits, respective signals from the output stages of a shift register operative at an input clock rate to multiply, at the output clock rate by using a plurality of multipliers, held signals from the latch circuits by filter coefficients that a plurality of coefficient generators sequentially generate to add the multiplied outputs by using an adder to provide a rate converted output signal. Thus, this rate converter makes it possible to carry out rate conversion by a single digital filter without necessity of digital filters operative at a clock rate of the least common multiple of the input clock rate and the output clock rate.
Claims7
A rate converter for Converting data rate of an input signal, comprising:
- shift-register means having a plurality of output stages, and adapted for sequentially shifting said input signal at an input clock rate of said input signal;.
- latch means connected to said output stages, and adapted for holding signals from said output stages and outputting the held signals at an output clock rate different from said input clock rate;
- coefficient generating means for generating filter coefficients at said output clock rate;
- multiplier means for multiplying said held signals from said latch means by said filter coefficients from said coefficient generating means, respectively;
- and
- adding means for adding output signals from said multiplier means to output a rate converted signal.
A down-rate converter for converting data rate of an input signal, comprising:
- a three stage shift-register having four output stages, and adapted for sequentially shifting said input signal at an input clock rate of said input signal;
- four latches connected to said output stages, and adapted for holding signals from said output stages, and outputting the held signals at an output clock rate different from said input clock rate;
- four coefficient generator for generating filter coefficients in a predetermined order at said output clock rate;
- four multipliers for multiplying said held signals from said latches by said filter coefficients from said coefficient generating means, respectively;
- and
- an adder for adding output signals from said multipliers to output a down-rate converted signal.
An up-rate converter for converting data rate of an input signal, comprising:
- a two-stage shift-register having three output stages, and for sequentially shifting said input signal at an input clock rate of said input signal;
- three latches connected to said output stages, and adapted for holding signals from said output stages, and outputting the held signals at an output clock rate different from said input clock rate;
- three coefficient generators for generating filter coefficients in a predetermined order at said output clock rate;
- three multipliers for multiplying said held signals from said latches by said filter coefficients from said coefficient generating means, respectively;
- and
- an adder for adding output signals from said multipliers to output an up-rate converted signal.
Dependencies are inferred from the claim text.