Buffer stage for use with a current controlled oscillator
AssigneeSGS-Thomson Microelectronics S.A.
InventorVivek Sharma
Life of this patent
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Abstract
A ring oscillator buffer stage, supplied by an adjustable current source of an asymmetrical current controlled ring oscillator, is provided for amplifying the output of the ring oscillator. The frequency of the ring oscillator varies as a function of a control signal. The buffer stage includes; a plurality of current controlled buffers, supplied by currents which are controlled in correspondence with the control signal, for amplifying the output of the oscillator; and a buffer for amplifying the output of the current controlled buffers for providing a full-swing output signal with a duty cycle of approximately 50%.
Claims34
A buffer stage for buffering an input signal generated by an asymmetrical current controlled oscillator that is controlled by a control signal, the input signal having a frequency that varies as a function of the control signal supplied to the oscillator, the buffer stage comprising:
- an input terminal that receives the input signal;
- an output terminal that outputs a buffered signal;
- at least one buffer, coupled between the input and output terminals, that buffers the input signal to generate the buffered signal, the at least one buffer having a current control terminal;
- and
- at least one current source having an output coupled to the current control terminal of the at least one buffer, the at least one current source further including at least one control terminal that receives the control signal so that a magnitude of a current output from the current source is controlled by the control signal.
A system for generating a variable frequency oscillating signal in response to a control signal, the system comprising:
- an oscillator that generates a first oscillating signal having a frequency and a first duty cycle, the frequency of the first oscillating signal being determined by the control signal;
- and
- a buffer stage, coupled to the oscillator, that buffers the first oscillating signal to generate a buffered oscillating signal having a second duty cycle, the buffer stage having a control terminal that receives the control signal, the buffer stage being responsive to the control signal to control the second duty cycle so that the second duty cycle is substantially equal to the first duty cycle despite variations in the frequency of the oscillating signal.
A method of buffering an input signal to a load, the input signal having a first duty cycle and a variable frequency determined by a control signal, the method including the steps of:
- A. providing a buffer that receives the input signal and generates a buffered signal that has a second duty cycle and is compatible with the load;
- and
- B. controlling the buffer so that the second duty cycle is substantially equal to the first duty cycle despite variations in the frequency of the input signal.
A system for generating a variable frequency oscillating signal, the system comprising:
- an oscillator that generates a first oscillating signal having a variable frequency and a first duty cycle;
- and
- a buffer stage that buffers the first signal to generate a buffered oscillating signal having a second duty cycle, the buffer stage including means for maintaining the second duty cycle to be substantially equal to the first duty cycle despite variations in the frequency of the first oscillating signal.
Dependencies are inferred from the claim text.