Class AB amplifier allowing quiescent current and gain to be set independently

An amplifying cell comprising:

• a first input port for receiving a first input voltage signal, a second input port for receiving a second input voltage signal, and an output port;
• an output transistor having a first terminal, a second terminal, and an control terminal, said first terminal coupled to said output port and said second terminal coupled to a first source of potential, said control terminal controlling the flow of current between said first and second terminals;
• a differential amplifying network comprising a first input terminal coupled to said first input port, a second input terminal coupled to said second input port, and an output coupled to said control terminal of said output transistor, and having an input voltage signal difference between said first and second input terminals, said amplifying network generating a current signal at its output as a function of said input voltage signal difference when said input voltage signal difference has a first polarity, and generating a substantially lower current signal at its output as a function of said difference when said difference has a second polarity opposite to said first polarity, said amplifying network further generating a quiescent output current at its output when the input voltage signal difference is substantially zero, said amplifying network further comprising a differential pair of transistors of a first bipolar transistor type, a current-mirror load comprising two transistors of a second bipolar transistor type complementary to said first type, and a first resistance, said transistors of said differential pair having their base terminals coupled to respective inputs of said amplifier network and their collector terminals coupled to respective collector terminals of said current-mirror transistors, the output of said differential amplifier being provided at the collector of a first one of said two current-mirror transistors, said first resistance being coupled in series with the emitter terminal of a second one of said two current-mirror transistors such that said first resistance reduces the magnitude of the quiescent output current of said amplifying network;
• and
• a bias network for generating a bias current and for coupling said bias current to said control terminal of said output transistor such that the total quiescent current provided to said control terminal of said output transistor is greater than the quiescent output current provided by said amplifying network.

An amplifier comprising:

• an input port for receiving an input voltage signal which cycles about a reference level;
• and
• two transconductance cells, each of said cells including an input coupled to said input voltage signal and an output, one of said cells generating a current in relation to said input voltage signal at its output when said input voltage signal is at a level above said reference, and the other of said cells generating a current in relation to said input voltage signal at its output when said input voltage signal is at a level below said reference level, each of said cells comprising:
• a differential amplifying network comprising a first input coupled to said input signal, a second input coupled to said reference level, and an output, said amplifying network generating a quiescent output current at its said output when the signals at said inputs are substantially the same level;
• an output transistor having a collector terminal coupled to said output of said cell and a base terminal coupled to said output of said differential amplifier such that said output transistor may receive said quiescent output current of said differential amplifying network;
• and
• a bias network for generating a bias current and for coupling said bias current to said base terminal of said output transistor such that the quiescent output current of said output transistor may be set to a desired value;
• wherein a maximum supply voltage within said amplifier is no greater than 2.0 V.