Automatic trigger circuit with floating-gate detection transistor

An automatic trigger circuit having a voltage comparator that a) receives a first level reference voltage that is to be monitored with respect to a second level reference voltage and b) produces a variation in an output signal on an output node when a voltage difference between said first and second level reference voltages exceeds a threshold, said automatic trigger circuit comprising:

• a two-arm current mirror including
• I a first arm connected between a DC electrical supply and a ground, said first arm including
• A a first transistor including a first source connected to said DC electrical supply, a first gate, and a first drain connected to said first gate;
• B a second transistor including a second gate connected to said DC electrical supply, a second drain connected to said first drain and a second source;
• C a third transistor including a third drain connected to said second source, a third gate for receiving said first level reference voltage, and a third source;
• and
• D a fourth transistor including a fourth drain connected to said third source and a fourth gate connected to said ground;
• and
• II a second arm connected between said DC electrical supply and said ground, said second arm including
• A a fifth transistor including a fifth source connected to said DC electrical supply, a fifth gate connected to said first gate and a fifth drain;
• and
• B a sixth transistor including a sixth drain connected to said fifth drain, a sixth gate for receiving said second level reference voltage, and a sixth source connected to said fourth drain;
• a first circuit for applying said first reference level potential to said third gate;
• a second circuit for applying said second reference level potential to said sixth gate;
• and
• a third circuit for simultaneously programming both said third transistor and said sixth transistor,
• wherein said third transistor is a floating-gate detection transistor.

A chip card comprising:

• an automatic trigger circuit having a voltage comparator that a) receives a first level reference voltage that is to be monitored with respect to a second level reference voltage and b) produces a variation in an output signal on an output node when a voltage difference between said first and second level reference voltages exceeds a threshold, said automatic trigger circuit including a two-arm current mirror including
• I a first arm connected between a DC electrical supply and a ground, said first arm including
• A a first transistor including a first source connected to said DC electrical supply, a first gate, and a first drain connected to said first gate;
• B a second transistor including a second gate connected to said DC electrical supply, a second drain connected to said first drain and a second source;
• C a third transistor including a third drain connected to said second source, a third gate for receiving said first level reference voltage, and a third source;
• and
• D a fourth transistor including a fourth drain connected to said third source and a fourth source connected to said ground;
• and
• II a second arm connected between said DC electrical supply and said ground, said second arm including
• A a fifth transistor including a fifth source connected to said DC electrical supply, a fifth gate connected to said first gate and a fifth drain;
• and
• B a sixth transistor including a sixth drain connected to said fifth drain, a sixth gate for receiving said second level reference voltage, and a sixth source connected to said fourth drain;
• wherein said third transistor is a floating-gate detection transistor.