Offset comparator with common mode voltage stability

A method of comparing first and second input voltage signals in a comparator circuit, the comparator circuit comprising:

• first and second transistors having first and second terminals respectively defining first and second current flow channels, and third terminals for respectively receiving said first and second input voltage signals for controlling individual current flows through said first and second current flow channels;
• third and fourth transistors having first and second terminals respectively defining third and fourth current flow channels, and third terminals for respectively receiving first and second offset voltage signals for controlling individual current flow through said third and fourth current flow channels;
• and
• current source subcircuitry coupled to said first, second, third and fourth transistors for flowing a first given combined current through said first and second current flow channels, and for flowing a second given combined current through said third and fourth current flow channels;
• and said method comprising:
• applying first and second offset voltage signals to said third terminals of said third and fourth transistors in response to said first and second input voltages respectively received at said third terminals of said first and second transistors;
• maintaining a common mode voltage of said first and second offset voltage signals at a given fixed relationship relative to a common mode voltage of said first and second input voltage signals;
• and
• generating a voltage output signal indicative of a comparison between the combined currents flowing in said first and third current flow channels and the combined currents flowing in said second and fourth current flow channels.

A method for applying an offset voltage differential to a comparator circuit having first and second voltage input terminals, said method comprising:

• applying first and second input voltage signals respectively to said first and second voltage input terminals;
• on a continuing basis, averaging said first and second input voltage signals to define an input voltage common mode signal;
• providing a reference voltage signal;
• generating said first and second offset voltage signals from said reference voltage signal and said input voltage common mode signal;
• setting said first and second offset voltage signals to have a voltage difference which continuously maintains a fixed relationship to said reference voltage and signals setting said first and second offset voltage signals to have an instantaneous average voltage which continuously maintains a fixed relationship to said input voltage common mode signal.