Method of manufacturing extended drain resurf lateral DMOS devices
AssigneeTexas Instruments Incorporated
InventorsChia-Cu P. Mei, Satwinder Malhi
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Abstract
A high voltage PMOS transistor 7 has improved on resistance by adjusting impurity concentration in a lightly doped drift region rim 48 to compensate for impurity segregation which occurs during the growth phase of a thick field oxide 43. During fabrication of high voltage PMOS device 7, a shallow vertical junction 230 formed by impurity segregation into field oxide 43. Implanting an HV drift region p-tank rim adjustment 220 and annealing it forms a lateral junction 250 and isolates the shallow junction 230 under field oxide 43. Thereby, the on-resistance of high voltage PMOS transistor 7 is minimized.
Claims5
A method for making a high voltage P-channel Metal Oxide Semiconductor, PMOS, device, comprising the steps of:
- forming a lightly doped high voltage drift region p-tank having a p-type impurity concentration, said drift region being adjacent to an n-type channel region;
- forming a vertical PN junction in a portion of the drift region p-tank which is adjacent to said n-type channel region by impurity segregation resulting from the growth of a high voltage field oxide;
- and
- forming a horizontal PN junction between said drift region and said channel region by implanting a drift region rim adjustment in a portion of the drift region adjacent to the channel region and under a portion of the field oxide such that said vertical PN junction is cutoff and isolated from said channel region.
Dependencies are inferred from the claim text.