US 5,511,223 AGranted

Diverse processor electronic protection and control module

AssigneeB&W Nuclear Service Company

InventorsJames Scecina, John G. Hinant, David P. Gerhard

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Abstract

A digital electronic module arrangement includes a module rack carrying a plurality of individual modules which can each be plugged into the rack. A test rack is connected to the module for applying test signals to each module. The module can select either process inputs or test inputs. A testing device provided for individually testing module outputs which respond to a common input. Each module has a rear bus board which has a connector that can be plugged into the module rack, and a forward digital bus board. A window in the front panel allows direct viewing of indicia on a chip corresponding to code within the chip. This code is electronically compared to code in the module software which relates to the module function. A nameplate on the front panel carries the same indicia for ensuring visual verification that the correct function is attributed to the correct module. Electronic verification is also provided by equipment in the test rack. Each module contains two diverse processors with connected logic for producing redundant signal processing and for creating a trip output when faults are detected either in the process or in the functioning of the module.

Claims6

Dependent claims

An improved control system for receiving input signals and for outputting output signals for use in one of process control, protection and indication, comprising:

at least one digital module, each of the at least one digital modules having a signal input stage, two diverse processors, and an output logic stage, said signal input stage receiving an input signal from a process and outputting a digital signal to said two diverse processors, said two diverse processors being of different design for computing a protection function and each connected to said signal input stage for receiving the same digital signal therefrom, each processor subjecting the digital signal to its own algorithm to create an output signal indicative of an operable processor, said output logic stage connected to said two diverse processors for receiving said two diverse processor output signals and for outputting an output signal, said output logic stage having logic means for generating the output logic stage output signal based upon a difference between said two diverse processor output signals and sending the output logic stage output signal to a plurality of trip output contacts connected in a trip string, one of said trip output contacts being constructed to place the at least one digital module in a desired state if one of said two diverse processors fail;
means for switching between the input signal from the process and a test signal, said switching means including relay means for allowing the input signal from the process to be connected to the at least one digital module and interlocking means for permitting a test signal to be read by the at least one digital module when disconnecting the input signal from the process from the at least one digital module;
test signal generating means connected to the two diverse processors for generating the test signal and sending the test signal to each of the two diverse processors;
test control means connected to the test signal generating means for checking a response from the two diverse processors;
and
response monitoring means for measuring a voltage of one of the trip output contacts in the trip string for monitoring the response of the at least one digital module trip output contact.

3 more elements

An improved control system for receiving input signals and for outputting output signals for use in one of process control, protection and indication, comprising:

at least one digital module, each of the at least one digital modules having a signal input stage, two diverse processors, and an output logic stage, said signal input stage receiving an input signal from a process and outputting a digital signal to said two diverse processors, said two diverse processors each being of a different design for computing a protection function and connected to said signal input stage for receiving the same digital signal therefrom, each processor subjecting the digital signal to its own algorithm to create an output signal indicative of an operable processor, said output logic stage connected to said two diverse processors for receiving said two diverse processor output signals and for outputting an output signal, said output logic stage having logic means for generating the output logic stage output signal based upon a difference in said two diverse processor output signals and sending the output logic stage output signal to switching means for placing the at least one digital module in a desired state if one of said two diverse processors fail;
and
a system cabinet with a module rack mounted in said cabinet and having a plurality of module receiving connectors, each of the at least one digital modules including a rear end and a front end with a connector at the rear end of each of the at least one digital modules which is pluggable into one of the module receiving connectors in the module rack, said system cabinet further having a test rack mounted therein along with a work station rack and a data bus for connecting said test rack and work station to each of the module receiving connectors for testing the functionality and identity of any of the at least one digital modules plugged into the module receiving connectors of the module rack, each of the at least one digital modules including a trip output contact which is opened and closed based upon a difference between the two diverse processor output signals, the test rack including means for measuring a voltage across the contact of each of the at least one digital modules when each of the at least one digital modules contact is open to test the trip output contact for each of the at least one digital modules separately, said means for measuring a voltage including a bypass contact for each output contact tested to provide for sequential testing of each output contact of multiple trip output contacts controlled by any one of the at least one digital modules and arranged in series in a trip string.

Dependencies are inferred from the claim text.