Method for interrupting one computer by another utilizing interrupt and lock bytes
OwnerFang Chai-Iinventor
Life of this patent
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Abstract
A plurality of computers or buses share a common memory system having a common memory, a plurality of front end circuits corresponding to the plurality of computers or buses, an internal logic circuit and internal address and memory buses. The plurality of computers or buses use certain locations in common memory to lock other computers or buses and to determine priority. The internal logic circuit generates hardware interrupts and synchronizes signals coming in through the front end circuits with the internal clock.
Claims4
A method for a first computer having an address register and a data register to interrupt a second computer by use of a common memory wherein at least one byte of common memory is associated with each computer as an interrupt byte and a lock state can be enabled by a lock byte in the common memory, the method comprising in combination the steps of:
- putting the address of the lock byte in common memory into the address register of the first computer;
- writing any data to the lock byte to enable the first computer's lock state;
- reading by the first computer of the interrupt byte of common memory associated with the second computer;
- putting title contents of the interrupt byte into the data register of the first computer;
- testing the interrupt byte for the second computer in the data register to see if it is in a locked state;
- if the associated interrupt byte of the second computer is in a locked state, repeating the steps of this method beginning with the step of writing any data to the lock byte;
- and
- if the interrupt byte of the second computer is not in a locked state, then setting the data register to a value to indicate the first computer and writing the data register value back to the interrupt byte.
Dependencies are inferred from the claim text.