Cache control system equipped with a loop lock indicator for indicating the presence and/or absence of an instruction in a feedback loop section
AssigneeHitachi, Ltd.
InventorsHiroshi Takeda, Shigezumi Matsui
Life of this patent
Estimating the term…
Abstract
In a cache memory 20, there exist a plurality of cache lines 201, each of which is equipped with a loop lock L for indicating that an instruction is present in a feedback loop section. The states of the loop locks L are dynamically changed according to the executed state of a program. At the time of excluding the cache lines for a prefetch, the instruction string in the loop is held in the cache memory 20 till the program control transfers to the outside of the loop.
Claims26
In a data processor including a central processing unit which is capable of executing a plurality of instructions including instructions for forming a feedback loop and a cache memory in which an instruction for the central processing unit is stored, said cache memory comprising:
- a data area in which the instruction is stored;
- a tag area which corresponds to the data area and in which an address related to the instruction is stored;
- a lock area which corresponds to the data area, in which data for inhibiting an instruction to be stored in the data area from being rewritten is set by the central processing unit if decoding of the instruction by the central processing unit during execution of the instruction to be stored in the data area indicates that the instruction to be stored in the data area is a part of the feedback loop, and in which data for allowing the instruction to be stored in the data area to be rewritten is set by the central processing unit, if the decoding of the instruction by the central processing unit indicates that the instruction to be stored in the data area is outside of the feedback loop;
- and
- a control circuit which controls the rewriting of the corresponding data area in accordance with the data in the corresponding lock area, so as to inhibit the rewriting to the data area if the data in the lock area indicates rewriting is to be inhibited, and so as to allow rewriting to the data area when the data in the lock area indicates allowance of the rewriting.
A cache memory system comprising:
- a memory storing a plurality of instructions which include instructions for forming a feedback loop;
- a CPU executing said plurality of instructions;
- and
- a cache memory storing a portion of said plurality of instructions stored in said memory,
- said cache memory comprising:
- a plurality of data areas in each of which each of the instructions included in said portion of instructions is stored;
- a plurality of tag areas which correspond to each of the plurality Of data areas, and in each of which an address related to one of the instructions stored in the corresponding data area is stored;
- a plurality of lock areas each of which corresponds to each of the data areas, in each of which data for inhibiting an instruction to be stored in the corresponding data area from being rewritten is set by the central processing unit, if decoding of the instruction to be stored in the corresponding data area by the central processing unit during execution of the instruction to be stored in the corresponding data area indicates that the instruction to be stored in the corresponding data area is part of the feedback loop, and in each of which data for allowing the instruction to be stored in the corresponding data area to be rewritten is set by the central processing unit, if the decoding of the instruction to be stored in the corresponding data area by the central processing unit indicates that the instruction to be stored in the corresponding data area is outside of the feedback loop;
- and
- a control circuit which controls rewriting of data with an instruction from the memory in accordance with the data in a corresponding lock area, so as to inhibit the rewriting to the data area if the data in the corresponding lock area indicates the rewriting is to be inhibited, and so as to allow the rewriting to the data area when the data in the corresponding lock area indicates allowance of the rewriting.
Dependencies are inferred from the claim text.