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US 5,511,146 AGranted
Excitory and inhibitory cellular automata for computational networks
AssigneeTexas Instruments Incorporated
InventorLaurence R. Simar, Jr.
Life of this patent
Estimating the term…
Abstract
A set of three cellular automata--the E-Cell, the I-Cell, and the D-Node--can be used to design and assemble parallel processing networks for such applications as signal processing and artificial intelligence. The E-Cell (FIG. 1a) is an excitory cell. The I-Cell (FIG. 2a) is an inhibitory cell. The D-Node (FIG. 3) is a combination of E-Cells and I-Cells. The use of the cellular automata is illustrated in three exemplary applications: a lateral inhibition network (FIG. 5b), a tree-search network (FIG. 6b), and a graph-search network (FIG. 7e). In particular, the tree-search and graph-search networks are implemented using the same structure as the tree or graph.
Claims17
A graph-search network assembled from cellular automata, comprising:
- a graph-search network configured from appropriately intercoupled D-node cellular automata arranged to be isomorphic to a preselected graph structure;
- said D-node cellular automata being configured from cellular automata that are an excitory E-Cell and inhibitory I-Cell;
- said delta D-node receiving inputs, x.sub.0 and x.sub.1, and providing an output, y.sub.0 ;
- said D-node being assembled from an inhibitory I-Cell, I.sub.0, and three excitory E-Cells, E.sub.0, E.sub.1, and E.sub.2 ;
- and
- said D-Node being configured such that (a) x.sub.0 is applied to I.sub.0 and to two inputs of E.sub.0, (b) x.sub.1 is applied to I.sub.0 and to two inputs of E.sub.1, (c) E.sub.0 and E.sub.1 also receive as inputs the output of I.sub.0, (d) a fourth input to each of E.sub.0 and E.sub.1 is the fed back output y.sub.0, (e) the outputs of E.sub.0 and E.sub.1 provide the inputs to E.sub.2, and (f) the output of E.sub.2 provides the D-Node output y.sub.0 ;
- said E-Cell receives a plurality of inputs, x.sub.n, each with an input value of -1, 0, or +1 and provides a single output, y.sub.0, with an output value of 0, or -1 that is determined in accordance with the following state vector and input functional relationships:
- ##EQU5## said I-Cell receives a plurality of inputs, x.sub.n, each with an input value of -1, 0, or +1 and provides a single output, y.sub.0, with an output value of 0, or +1 that is determined in accordance with the following state vector and input functional relationships:
- ##EQU6## where V.sub.EC and V.sub.IC are cell state vectors.
6 more elements
A computational network assembled from cellular automata, comprising:
- a computational network appropriately configured from intercoupled cellular automata, in which the cellular automata are cells, each having
- (i) a plurality of inputs with each input having one of a plurality of preselected logical values selected from the group consisting of -1, 0, and +1,
- (ii) a single output having one of a plurality of preselected logical values selected from the group consisting of -1, 0, and +1 in response to a value of a state vector,
- (iii) a state vector storage circuit for storing said state vector having at least three distinct binary values including the group consisting of -1, 0, and +1, and
- (iv) circuitry connected to said plurality of inputs and said state vector storage circuit and operable such that the value of said state vector is
- (a) increased by a logical 1 if the sum of the input values is positive,
- (b) not changed if the sum of the input values is zero,
- (c) decreased by a logical 1 if the sum of the input values is negative.
5 more elements
Cellular automata for assembling computational networks, comprising:
- an inhibitory and excitory cell, each having
- (i) a plurality of inputs with each input having one of a plurality of preselected logical values selected from the group consisting of -1, 0, and +1,
- (ii) a single output having one of a plurality of preselected logical values selected from the group consisting of -1, 0, and +1 in response to a value of a state vector,
- (iii) a state vector storage circuit for storing said state vector having at least three distinct binary values including the group consisting of -1, 0, and +1, and
- (iv) first circuitry connected to said plurality of inputs and said state vector storage circuit and operable such that the value of said state vector is
- (a) increased by a logical 1 if the sum of the input values is positive,
- (b) not changed if the sum of the input values is zero,
- (c) decreased by a logical 1 if the sum of the input values is negative.
5 more elements
A cellular automata for assembling computational networks, comprising:
- a cell, having
- (i) a plurality of inputs with each input having one of a plurality of preselected logical values selected from the group consisting of -1, 0, and +1,
- (ii) a single output having one of a plurality of preselected logical values selected from the group consisting of -1, 0, and +1 in response to a value of a state vector,
- (iii) a state vector storage circuit for storing said state vector having at least three distinct binary values, including the group consisting of -1, 0, and +1, and
- (vi) circuitry connected to said plurality of inputs and said state vector storage circuit and operable such that the value of said state vector is
- (a) increased by a logical 1 if the sum of the input values is positive,
- (b) not changed if the sum of the input values is zero,
- (c) decreased by a logical 1 if the sum of the input values is negative.
5 more elements
A tree-search network assembled from cellular automata, comprising:
- cellular automata arranged and intercoupled to be isomorphic to a preselected tree structure;
- each cell having
- (i) a plurality of inputs with each input having one of a plurality of preselected logical values selected from the group consisting of -1, 0, and +1,
- (ii) a single output having one of a plurality of preselected logical values selected from the group consisting of -1, 0, and +1 in response to a value of a state vector,
- (iii) a state vector storage circuit for storing said state vector having at least three distinct binary values, including the group consisting of -1, 0, and +1, and
- (iv) circuit connected to said plurality of inputs and said state vector storage circuit and operable such that the value of said state vector is
- (a) increased by a logical 1 if the sum of the input values is positive,
- (b) not changed if the sum of the input values is zero,
- (c) decreased by a logical 1 if the sum of the input values is negative.
6 more elements
Dependencies are inferred from the claim text.