High resolution timer using low resolution counter
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorTakashi Kashine
Life of this patent
Estimating the term…
Abstract
Accurate measurement results can be obtained without increasing the number of bits of a timer. A timer 1 performs counting with low-speed clocks immediately after input pulse is inputted. When the value counted by the timer with the low-speed clock coincides with the set value of a switching set value register 4, high-speed clocks are inputted to the timer 1 by a clock switching circuit 6 which is switched by the output of a comparison circuit 5.
Claims6
A measuring timer system coupled to an input signal source, an input signal generated by the source including previous and subsequent input pulses, the timer system outputing a value representing the period of the input signal, the timer system comprising
- low-speed clock means for providing a low speed sequence of clock pulses;
- high-speed clock means for providing a high speed sequence of clock pulses;
- timer means for counting and outputing a count of clock pulses, wherein the timer means begins to count said low speed sequence of clock pulses upon receipt of a previous input pulse of the input signal, wherein the timer means counts said low speed sequence of clock pulses for a predetermined time Tc and then counts said high speed sequence of clock pulses;
- clock switching means coupled to the high-speed clock means and to the timer means for selectively coupling the high-speed clock means to the timer means in response to a clock select signal;
- and
- control means coupled to the clock switching means for outputing the clock select signal to the clock switching means when the predetermined time Tc elapses.
Dependencies are inferred from the claim text.