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AssigneeNational Semiconductor Corporation
InventorsAlbert Bergemont, Min-hwa Chi
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Multiple logic levels can be programmed into a single EPROM or FLASH memory cell by applying one of a corresponding number of programming voltages to the control gate of a memory cell that has a forward-biased source-to-substrate junction and a reverse-biased drain-to-substrate junction. During programming, the bias conditions form substrate hot electrons which, in addition to the channel hot electrons, accumulate on the floating gate. By utilizing the substrate hot electrons, a much lower control gate voltage can be utilized during programming. More importantly, however, once the channel hot electrons cease to exist, the substrate hot electrons and holes converge to a stable charge that is related to the control gate voltage used during programming and the programmed threshold voltage of the cell.
A method for programming a single floating-gate memory cell to store one of three or more threshold voltages, the memory cell having a source formed in a substrate, a drain formed in the substrate a distance apart from the source, a floating gate formed over the substrate, and a control gate formed over the floating gate, the method comprising the steps of:
Dependencies are inferred from the claim text.