Multiplexer receiving at its input a plurality of identical, but out of phase, signals

A multiplexer system comprising:

• a first multiplexer, receiving a plurality of input signals of odd rank and providing an output signal;
• a second multiplexer, coupled to the first multiplexer, receiving a plurality of input signals of even rank and providing an output signal, each input signal of the plurality of input signals of even rank and odd rank being out of phase with respect to the other input
• a third multiplexer, to the first and second multiplexers, receiving at first and second inputs the output signals of the first and second multiplexers, respectively, and providing an output signal of the multiplexer system;
• a fourth multiplexer, coupled to the first and second multiplexers, receiving at first and second inputs the output signals of the first and second multiplexers, respectively, and providing an output signal;
• a control circuit, coupled to the first multiplexer, the second multiplexer, the third multiplexer and the fourth multiplexer responsive to a switching signal, that controls a switching of the output signal from a present input signal to a next provided input signal;
• and
• a synchronizing circuit, coupled to the plurality of multiplexers and the control circuit, that synchronizes the switching signal with an edge of the next provided input signal.

A method of controlling operation of a multiplexer system comprising the steps of:

• providing a plurality of input signals to a first plurality of multiplexers, each input signal being out of phase with respect to the other input signals;
• selecting a first input signal and a second input signal from the plurality of input signals, with the first plurality of multiplexers, in response to a first active edge of a switching signal;
• transmitting each of the first input signal and the second input signal to a second plurality of multiplexers;
• in response to a second active edge of the switching signal and if the first input signal and the second input signal are in the same logic state, controlling the second plurality of multiplexers to switch an output signal of the multiplexer system from the first input signal to the second input signal.