Powered testing of mixed conventional/boundary-scan logic

A method of testing a circuit board having (i) a number of boundary-scan (BS) nodes, and

• (ii) a number of non-boundary-scan (NBS) nodes that are nodes that are not BS nodes, the method comprising the steps of:
• providing position data for each of the number of BS and NBS nodes on the circuit board to the tester;
• providing a predetermined distance (R) to the tester, wherein R is in the range of one to five millimeters;
• determining an group of independent NBS nodes such that each BS node on the circuit board is within the predetermined distance of only one NBS node in the independent group;
• applying a predetermined voltage corresponding to a first logic state to the BS nodes;
• applying a predetermined voltage corresponding to a second logic state to all of the NBS nodes of the group of independent NBS nodes;
• capturing voltages on the BS nodes while the predetermined voltage corresponding to a second logic state is applied;
• and
• analyzing the captured voltages to detect electrical shorts between any of the NBS nodes in the independent group and a BS node.

A method of testing a circuit board having at least one boundary-scan node and at least one non-boundary-scan node, the method comprising the steps of:

• applying a first test voltage to the at least one boundary-scan node;
• applying a second test voltage to the at least one non-boundary-scan node;
• storing a first resulting voltage on the at least one boundary-scan node;
• applying the second test voltage to the at least one boundary-scan node;
• applying the first test voltage to the at least one non-boundary-scan node;
• storing a second resulting voltage on the at least one boundary-scan node;
• and
• generating a failure message when both i) the first resulting voltage corresponds to the second test voltage and ii) the second resulting voltage corresponds to the first test voltage.