Method of fabricating a flex laminate package

A method of forming signal interconnection circuitization means in a parallel processor structure having a plurality of processor integrated circuit chips, a plurality of memory integrated circuit chips, with the signal interconnection circuitization means therebetween, wherein:

• a. the processor integrated circuit chips and the memory integrated circuited chips are mounted on a plurality of printed circuit boards with a first processor integrated circuit printed circuit board having a first processor integrated circuit chip mounted thereon, a second processor integrated circuit printed circuit board having a second processor integrated circuit chip mounted thereon, a first memory integrated circuit printed circuit board having a first memory integrated circuit chip mounted thereon, and a second memory integrated circuit printed circuit board having a second memory integrated circuit chip mounted thereon;
• and
• b. said printed circuit boards are mounted on a plurality of circuitized flexible strips, said circuitized flexible strips having a signal interconnection circuitization portion with X-Y planar circuitization and vias and through holes terminating at electrically conductive pads for Z-axis circuitization, a terminal portion having means for joining a printed circuit board thereto, and a flexible, circuitized portion between said signal interconnection circuitization portion and said terminal portion, whereby said circuitized flexible strips are laminated in physical connection and through said electrically conductive pads in electrical connection at their signal interconnection circuitization portions and spaced apart at their terminal portions;
• said method comprising:
• a. depositing metals on said pair of facing pads, said metals being from a eutectic forming system and having a non-eutectic stoichiometry;
• and
• b. heating and applying a compressive force to the circuitized polymeric panels to bond the panels;
• and wherein said panels are heated above a first thermal transition temperature of the polymer, and the eutectic temperature of the eutectic forming system is below the first thermal transition temperature of the polymer used in bonding, and the melting point of the homogenized metallic composition is above the first thermal transition temperature of the polymer used in bonding, to thereby form signal interconnection circuitization means in the parallel processor.