Series-gated emitter-coupled logic circuit providing closely spaced output voltages
AssigneeNational Semiconductor Corporation
InventorLoren W. Yee
Life of this patent
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Abstract
An emitter-coupled logic circuit provides differential outputs which are delivered to pairs of transistors in emitter-coupled logic (ECL) switches. The differential outputs allow additional ECL switches to be connected between a positive and negative supply voltage. A unique current source for the ECL switches includes diodes and/or transistors connected in parallel with the ECL switches such that the supply current is relatively independent of fluctuations in the supply voltage and yet the voltage drop across the current source is minimized.
Claims21
An emitter-coupled logic circuit, connected between a first supply terminal and a second supply terminal, comprising:
- a plurality of decision-making levels, each of said decision-making levels comprising a pair of transistors having respective emitter terminals connected together;
- and
- an output circuit connected to said decision making levels;
- said output circuit comprising a first load resistor and a PN junction connected in series, and a voltage divider, an end terminal of said voltage divider being connected to a terminal of said PN junction, said PN junction being included in a first output transistor;
- said output circuit further comprising a first output terminal connected to a base terminal of said first output transistor and a second output terminal connected to an intermediate terminal of said voltage divider.
An emitter-coupled logic circuit, connected between a first supply terminal and a second supply terminal, comprising:
- a plurality of decision-making levels, each of said decision-making levels comprising a pair of transistors having respective emitter terminals coupled together, wherein one transistor in each of said transistor pairs receives a true input and the other transistor receives an inverse input;
- a pair of load resistors connected between one of said decision-making levels and said first supply terminal;
- a current source, said current source comprising a plurality of PN junctions connected serially in a conduction path;
- and
- a current supply resistor having a first terminal connected to one of said decision-making levels, said plurality of PN junctions being connected between said first supply terminal and a second terminal of said current supply resistor, said first supply terminal being connected to a first supply voltage, said second terminal of said current supply resistor being connected through a damping resistor to said second supply terminal, said second supply terminal being connected to a second supply voltage.
An emitter-coupled logic circuit, connected between a first voltage supply and a second voltage supply, comprising:
- a plurality of decision-making levels, each of said decision-making levels comprising a pair of transistors having respective emitter terminals coupled together, wherein one transistor in each of said transistor pairs receives a true input and the other transistor receives an inverse input;
- a pair of load resistors connected between one of said decision-making levels and said first voltage supply;
- and
- a current source, said current source comprising a current source resistor and a damping resistor connected in series between the emitter terminals of one of said transistor pairs and said second voltage supply, said damping resistor having a terminal connected to said second voltage supply, said current source further comprising a plurality of PN junctions connected serially in a conduction path which extends between said first voltage supply and a common node between said current source resistor and said damping resistor.
Dependencies are inferred from the claim text.